[PATCH v4 08/13] media: iris: Rename clock and power domain macros to use vcodec prefix
From: Vishnu Reddy
Date: Tue May 05 2026 - 03:07:19 EST
The current clock and power domain enum names are too generic. Rename
them with a vcodec prefix to make the names more meaningful and to easily
accommodate vcodec1 enums for the secondary core for glymur platform.
No functional changes intended.
Signed-off-by: Vishnu Reddy <busanna.reddy@xxxxxxxxxxxxxxxx>
---
.../platform/qcom/iris/iris_platform_common.h | 12 ++++----
.../media/platform/qcom/iris/iris_platform_gen1.c | 6 ++--
.../media/platform/qcom/iris/iris_platform_gen2.c | 6 ++--
.../platform/qcom/iris/iris_platform_sc7280.h | 10 +++----
.../platform/qcom/iris/iris_platform_sm8750.h | 12 ++++----
drivers/media/platform/qcom/iris/iris_vpu3x.c | 21 +++++++-------
drivers/media/platform/qcom/iris/iris_vpu4x.c | 30 +++++++++++---------
drivers/media/platform/qcom/iris/iris_vpu_common.c | 33 +++++++++++-----------
8 files changed, 67 insertions(+), 63 deletions(-)
diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/drivers/media/platform/qcom/iris/iris_platform_common.h
index 55ff6137d9a9..30e9d4d288c6 100644
--- a/drivers/media/platform/qcom/iris/iris_platform_common.h
+++ b/drivers/media/platform/qcom/iris/iris_platform_common.h
@@ -49,14 +49,14 @@ extern const struct iris_platform_data sm8650_data;
extern const struct iris_platform_data sm8750_data;
enum platform_clk_type {
- IRIS_AXI_CLK, /* AXI0 in case of platforms with multiple AXI clocks */
+ IRIS_AXI_VCODEC_CLK,
IRIS_CTRL_CLK,
IRIS_AHB_CLK,
- IRIS_HW_CLK,
- IRIS_HW_AHB_CLK,
- IRIS_AXI1_CLK,
+ IRIS_VCODEC_CLK,
+ IRIS_VCODEC_AHB_CLK,
+ IRIS_AXI_CTRL_CLK,
IRIS_CTRL_FREERUN_CLK,
- IRIS_HW_FREERUN_CLK,
+ IRIS_VCODEC_FREERUN_CLK,
IRIS_BSE_HW_CLK,
IRIS_VPP0_HW_CLK,
IRIS_VPP1_HW_CLK,
@@ -206,7 +206,7 @@ struct icc_vote_data {
enum platform_pm_domain_type {
IRIS_CTRL_POWER_DOMAIN,
- IRIS_HW_POWER_DOMAIN,
+ IRIS_VCODEC_POWER_DOMAIN,
IRIS_VPP0_HW_POWER_DOMAIN,
IRIS_VPP1_HW_POWER_DOMAIN,
IRIS_APV_HW_POWER_DOMAIN,
diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen1.c b/drivers/media/platform/qcom/iris/iris_platform_gen1.c
index df8e6bf9430e..be6a631f8ede 100644
--- a/drivers/media/platform/qcom/iris/iris_platform_gen1.c
+++ b/drivers/media/platform/qcom/iris/iris_platform_gen1.c
@@ -284,9 +284,9 @@ static const char * const sm8250_pmdomain_table[] = { "venus", "vcodec0" };
static const char * const sm8250_opp_pd_table[] = { "mx" };
static const struct platform_clk_data sm8250_clk_table[] = {
- {IRIS_AXI_CLK, "iface" },
- {IRIS_CTRL_CLK, "core" },
- {IRIS_HW_CLK, "vcodec0_core" },
+ {IRIS_AXI_VCODEC_CLK, "iface" },
+ {IRIS_CTRL_CLK, "core" },
+ {IRIS_VCODEC_CLK, "vcodec0_core" },
};
static const char * const sm8250_opp_clk_table[] = {
diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/drivers/media/platform/qcom/iris/iris_platform_gen2.c
index 5da90d47f9c6..47c6b650f0b4 100644
--- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c
+++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c
@@ -780,9 +780,9 @@ static const char * const sm8550_pmdomain_table[] = { "venus", "vcodec0" };
static const char * const sm8550_opp_pd_table[] = { "mxc", "mmcx" };
static const struct platform_clk_data sm8550_clk_table[] = {
- {IRIS_AXI_CLK, "iface" },
- {IRIS_CTRL_CLK, "core" },
- {IRIS_HW_CLK, "vcodec0_core" },
+ {IRIS_AXI_VCODEC_CLK, "iface" },
+ {IRIS_CTRL_CLK, "core" },
+ {IRIS_VCODEC_CLK, "vcodec0_core" },
};
static const char * const sm8550_opp_clk_table[] = {
diff --git a/drivers/media/platform/qcom/iris/iris_platform_sc7280.h b/drivers/media/platform/qcom/iris/iris_platform_sc7280.h
index 0ec8f334df67..6b783e524b81 100644
--- a/drivers/media/platform/qcom/iris/iris_platform_sc7280.h
+++ b/drivers/media/platform/qcom/iris/iris_platform_sc7280.h
@@ -16,11 +16,11 @@ static const struct bw_info sc7280_bw_table_dec[] = {
static const char * const sc7280_opp_pd_table[] = { "cx" };
static const struct platform_clk_data sc7280_clk_table[] = {
- {IRIS_CTRL_CLK, "core" },
- {IRIS_AXI_CLK, "iface" },
- {IRIS_AHB_CLK, "bus" },
- {IRIS_HW_CLK, "vcodec_core" },
- {IRIS_HW_AHB_CLK, "vcodec_bus" },
+ {IRIS_CTRL_CLK, "core" },
+ {IRIS_AXI_VCODEC_CLK, "iface" },
+ {IRIS_AHB_CLK, "bus" },
+ {IRIS_VCODEC_CLK, "vcodec_core" },
+ {IRIS_VCODEC_AHB_CLK, "vcodec_bus" },
};
static const char * const sc7280_opp_clk_table[] = {
diff --git a/drivers/media/platform/qcom/iris/iris_platform_sm8750.h b/drivers/media/platform/qcom/iris/iris_platform_sm8750.h
index 719056656a5b..f843f13251c5 100644
--- a/drivers/media/platform/qcom/iris/iris_platform_sm8750.h
+++ b/drivers/media/platform/qcom/iris/iris_platform_sm8750.h
@@ -11,12 +11,12 @@ static const char * const sm8750_clk_reset_table[] = {
};
static const struct platform_clk_data sm8750_clk_table[] = {
- {IRIS_AXI_CLK, "iface" },
- {IRIS_CTRL_CLK, "core" },
- {IRIS_HW_CLK, "vcodec0_core" },
- {IRIS_AXI1_CLK, "iface1" },
- {IRIS_CTRL_FREERUN_CLK, "core_freerun" },
- {IRIS_HW_FREERUN_CLK, "vcodec0_core_freerun" },
+ {IRIS_AXI_VCODEC_CLK, "iface" },
+ {IRIS_CTRL_CLK, "core" },
+ {IRIS_VCODEC_CLK, "vcodec0_core" },
+ {IRIS_AXI_CTRL_CLK, "iface1" },
+ {IRIS_CTRL_FREERUN_CLK, "core_freerun" },
+ {IRIS_VCODEC_FREERUN_CLK, "vcodec0_core_freerun" },
};
#endif
diff --git a/drivers/media/platform/qcom/iris/iris_vpu3x.c b/drivers/media/platform/qcom/iris/iris_vpu3x.c
index 3dad47be78b5..834194cb5513 100644
--- a/drivers/media/platform/qcom/iris/iris_vpu3x.c
+++ b/drivers/media/platform/qcom/iris/iris_vpu3x.c
@@ -209,7 +209,7 @@ static int iris_vpu33_power_off_controller(struct iris_core *core)
disable_power:
iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_CTRL_POWER_DOMAIN]);
- iris_disable_unprepare_clock(core, IRIS_AXI_CLK);
+ iris_disable_unprepare_clock(core, IRIS_AXI_VCODEC_CLK);
return 0;
}
@@ -218,30 +218,31 @@ static int iris_vpu35_power_on_hw(struct iris_core *core)
{
int ret;
- ret = iris_enable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN]);
+ ret = iris_enable_power_domains(core,
+ core->pmdomain_tbl->pd_devs[IRIS_VCODEC_POWER_DOMAIN]);
if (ret)
return ret;
- ret = iris_prepare_enable_clock(core, IRIS_AXI_CLK);
+ ret = iris_prepare_enable_clock(core, IRIS_AXI_VCODEC_CLK);
if (ret)
goto err_disable_power;
- ret = iris_prepare_enable_clock(core, IRIS_HW_FREERUN_CLK);
+ ret = iris_prepare_enable_clock(core, IRIS_VCODEC_FREERUN_CLK);
if (ret)
goto err_disable_axi_clk;
- ret = iris_prepare_enable_clock(core, IRIS_HW_CLK);
+ ret = iris_prepare_enable_clock(core, IRIS_VCODEC_CLK);
if (ret)
goto err_disable_hw_free_clk;
return 0;
err_disable_hw_free_clk:
- iris_disable_unprepare_clock(core, IRIS_HW_FREERUN_CLK);
+ iris_disable_unprepare_clock(core, IRIS_VCODEC_FREERUN_CLK);
err_disable_axi_clk:
- iris_disable_unprepare_clock(core, IRIS_AXI_CLK);
+ iris_disable_unprepare_clock(core, IRIS_AXI_VCODEC_CLK);
err_disable_power:
- iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN]);
+ iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_VCODEC_POWER_DOMAIN]);
return ret;
}
@@ -250,8 +251,8 @@ static void iris_vpu35_power_off_hw(struct iris_core *core)
{
iris_vpu33_power_off_hardware(core);
- iris_disable_unprepare_clock(core, IRIS_HW_FREERUN_CLK);
- iris_disable_unprepare_clock(core, IRIS_AXI_CLK);
+ iris_disable_unprepare_clock(core, IRIS_VCODEC_FREERUN_CLK);
+ iris_disable_unprepare_clock(core, IRIS_AXI_VCODEC_CLK);
}
const struct vpu_ops iris_vpu3_ops = {
diff --git a/drivers/media/platform/qcom/iris/iris_vpu4x.c b/drivers/media/platform/qcom/iris/iris_vpu4x.c
index 02e100a4045f..92c0b06bbbff 100644
--- a/drivers/media/platform/qcom/iris/iris_vpu4x.c
+++ b/drivers/media/platform/qcom/iris/iris_vpu4x.c
@@ -27,7 +27,8 @@ static int iris_vpu4x_genpd_set_hwmode(struct iris_core *core, bool hw_mode, u32
{
int ret;
- ret = dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN], hw_mode);
+ ret = dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_VCODEC_POWER_DOMAIN],
+ hw_mode);
if (ret)
return ret;
@@ -63,7 +64,7 @@ static int iris_vpu4x_genpd_set_hwmode(struct iris_core *core, bool hw_mode, u32
dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_VPP0_HW_POWER_DOMAIN],
!hw_mode);
restore_hw_domain_mode:
- dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN], !hw_mode);
+ dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_VCODEC_POWER_DOMAIN], !hw_mode);
return ret;
}
@@ -162,15 +163,15 @@ static int iris_vpu4x_enable_hardware_clocks(struct iris_core *core, u32 efuse_v
{
int ret;
- ret = iris_prepare_enable_clock(core, IRIS_AXI_CLK);
+ ret = iris_prepare_enable_clock(core, IRIS_AXI_VCODEC_CLK);
if (ret)
return ret;
- ret = iris_prepare_enable_clock(core, IRIS_HW_FREERUN_CLK);
+ ret = iris_prepare_enable_clock(core, IRIS_VCODEC_FREERUN_CLK);
if (ret)
goto disable_axi_clock;
- ret = iris_prepare_enable_clock(core, IRIS_HW_CLK);
+ ret = iris_prepare_enable_clock(core, IRIS_VCODEC_CLK);
if (ret)
goto disable_hw_free_run_clock;
@@ -198,11 +199,11 @@ static int iris_vpu4x_enable_hardware_clocks(struct iris_core *core, u32 efuse_v
disable_bse_hw_clock:
iris_disable_unprepare_clock(core, IRIS_BSE_HW_CLK);
disable_hw_clock:
- iris_disable_unprepare_clock(core, IRIS_HW_CLK);
+ iris_disable_unprepare_clock(core, IRIS_VCODEC_CLK);
disable_hw_free_run_clock:
- iris_disable_unprepare_clock(core, IRIS_HW_FREERUN_CLK);
+ iris_disable_unprepare_clock(core, IRIS_VCODEC_FREERUN_CLK);
disable_axi_clock:
- iris_disable_unprepare_clock(core, IRIS_AXI_CLK);
+ iris_disable_unprepare_clock(core, IRIS_AXI_VCODEC_CLK);
return ret;
}
@@ -216,9 +217,9 @@ static void iris_vpu4x_disable_hardware_clocks(struct iris_core *core, u32 efuse
iris_disable_unprepare_clock(core, IRIS_VPP0_HW_CLK);
iris_disable_unprepare_clock(core, IRIS_BSE_HW_CLK);
- iris_disable_unprepare_clock(core, IRIS_HW_CLK);
- iris_disable_unprepare_clock(core, IRIS_HW_FREERUN_CLK);
- iris_disable_unprepare_clock(core, IRIS_AXI_CLK);
+ iris_disable_unprepare_clock(core, IRIS_VCODEC_CLK);
+ iris_disable_unprepare_clock(core, IRIS_VCODEC_FREERUN_CLK);
+ iris_disable_unprepare_clock(core, IRIS_AXI_VCODEC_CLK);
}
static int iris_vpu4x_power_on_hardware(struct iris_core *core)
@@ -226,7 +227,8 @@ static int iris_vpu4x_power_on_hardware(struct iris_core *core)
u32 efuse_value = readl(core->reg_base + WRAPPER_EFUSE_MONITOR);
int ret;
- ret = iris_enable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN]);
+ ret = iris_enable_power_domains(core,
+ core->pmdomain_tbl->pd_devs[IRIS_VCODEC_POWER_DOMAIN]);
if (ret)
return ret;
@@ -267,7 +269,7 @@ static int iris_vpu4x_power_on_hardware(struct iris_core *core)
iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs
[IRIS_VPP0_HW_POWER_DOMAIN]);
disable_hw_power_domain:
- iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN]);
+ iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_VCODEC_POWER_DOMAIN]);
return ret;
}
@@ -345,7 +347,7 @@ static void iris_vpu4x_power_off_hardware(struct iris_core *core)
iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs
[IRIS_VPP0_HW_POWER_DOMAIN]);
- iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN]);
+ iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_VCODEC_POWER_DOMAIN]);
}
static int iris_vpu4x_set_hwmode(struct iris_core *core)
diff --git a/drivers/media/platform/qcom/iris/iris_vpu_common.c b/drivers/media/platform/qcom/iris/iris_vpu_common.c
index f1f9e04b7c31..73c094bc4311 100644
--- a/drivers/media/platform/qcom/iris/iris_vpu_common.c
+++ b/drivers/media/platform/qcom/iris/iris_vpu_common.c
@@ -213,7 +213,7 @@ int iris_vpu_power_off_controller(struct iris_core *core)
disable_power:
iris_disable_unprepare_clock(core, IRIS_AHB_CLK);
iris_disable_unprepare_clock(core, IRIS_CTRL_CLK);
- iris_disable_unprepare_clock(core, IRIS_AXI_CLK);
+ iris_disable_unprepare_clock(core, IRIS_AXI_VCODEC_CLK);
iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_CTRL_POWER_DOMAIN]);
return 0;
@@ -221,10 +221,10 @@ int iris_vpu_power_off_controller(struct iris_core *core)
void iris_vpu_power_off_hw(struct iris_core *core)
{
- dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN], false);
- iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN]);
- iris_disable_unprepare_clock(core, IRIS_HW_AHB_CLK);
- iris_disable_unprepare_clock(core, IRIS_HW_CLK);
+ dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_VCODEC_POWER_DOMAIN], false);
+ iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_VCODEC_POWER_DOMAIN]);
+ iris_disable_unprepare_clock(core, IRIS_VCODEC_AHB_CLK);
+ iris_disable_unprepare_clock(core, IRIS_VCODEC_CLK);
}
void iris_vpu_power_off(struct iris_core *core)
@@ -251,7 +251,7 @@ int iris_vpu_power_on_controller(struct iris_core *core)
if (ret)
goto err_disable_power;
- ret = iris_prepare_enable_clock(core, IRIS_AXI_CLK);
+ ret = iris_prepare_enable_clock(core, IRIS_AXI_VCODEC_CLK);
if (ret)
goto err_disable_power;
@@ -268,7 +268,7 @@ int iris_vpu_power_on_controller(struct iris_core *core)
err_disable_ctrl_clock:
iris_disable_unprepare_clock(core, IRIS_CTRL_CLK);
err_disable_axi_clock:
- iris_disable_unprepare_clock(core, IRIS_AXI_CLK);
+ iris_disable_unprepare_clock(core, IRIS_AXI_VCODEC_CLK);
err_disable_power:
iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_CTRL_POWER_DOMAIN]);
@@ -279,31 +279,32 @@ int iris_vpu_power_on_hw(struct iris_core *core)
{
int ret;
- ret = iris_enable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN]);
+ ret = iris_enable_power_domains(core,
+ core->pmdomain_tbl->pd_devs[IRIS_VCODEC_POWER_DOMAIN]);
if (ret)
return ret;
- ret = iris_prepare_enable_clock(core, IRIS_HW_CLK);
+ ret = iris_prepare_enable_clock(core, IRIS_VCODEC_CLK);
if (ret)
goto err_disable_power;
- ret = iris_prepare_enable_clock(core, IRIS_HW_AHB_CLK);
+ ret = iris_prepare_enable_clock(core, IRIS_VCODEC_AHB_CLK);
if (ret && ret != -ENOENT)
goto err_disable_hw_clock;
return 0;
err_disable_hw_clock:
- iris_disable_unprepare_clock(core, IRIS_HW_CLK);
+ iris_disable_unprepare_clock(core, IRIS_VCODEC_CLK);
err_disable_power:
- iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN]);
+ iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_VCODEC_POWER_DOMAIN]);
return ret;
}
int iris_vpu_set_hwmode(struct iris_core *core)
{
- return dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN], true);
+ return dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_VCODEC_POWER_DOMAIN], true);
}
int iris_vpu_switch_to_hwmode(struct iris_core *core)
@@ -366,7 +367,7 @@ int iris_vpu35_vpu4x_power_off_controller(struct iris_core *core)
disable_power:
iris_disable_unprepare_clock(core, IRIS_CTRL_CLK);
iris_disable_unprepare_clock(core, IRIS_CTRL_FREERUN_CLK);
- iris_disable_unprepare_clock(core, IRIS_AXI1_CLK);
+ iris_disable_unprepare_clock(core, IRIS_AXI_CTRL_CLK);
iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_CTRL_POWER_DOMAIN]);
@@ -383,7 +384,7 @@ int iris_vpu35_vpu4x_power_on_controller(struct iris_core *core)
if (ret)
return ret;
- ret = iris_prepare_enable_clock(core, IRIS_AXI1_CLK);
+ ret = iris_prepare_enable_clock(core, IRIS_AXI_CTRL_CLK);
if (ret)
goto err_disable_power;
@@ -400,7 +401,7 @@ int iris_vpu35_vpu4x_power_on_controller(struct iris_core *core)
err_disable_ctrl_free_clk:
iris_disable_unprepare_clock(core, IRIS_CTRL_FREERUN_CLK);
err_disable_axi1_clk:
- iris_disable_unprepare_clock(core, IRIS_AXI1_CLK);
+ iris_disable_unprepare_clock(core, IRIS_AXI_CTRL_CLK);
err_disable_power:
iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_CTRL_POWER_DOMAIN]);
--
2.34.1