[PATCH] riscv: dts: microchip: fix pic64gx gpio interrupt-cells
From: Conor Dooley
Date: Tue May 05 2026 - 10:30:07 EST
From: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
As the pic64gx devicetree files got added in parallel to the
GPIO interrupt-cells being fixed for PolarFire SoC, they didn't get
changed to the correct values. Fix them now.
Fixes: 7219d20f9f421 ("riscv: dts: microchip: add pic64gx and its curiosity kit")
Signed-off-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
---
CC: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
CC: Daire McNamara <daire.mcnamara@xxxxxxxxxxxxx>
CC: Rob Herring <robh@xxxxxxxxxx>
CC: Krzysztof Kozlowski <krzk+dt@xxxxxxxxxx>
CC: Pierre-Henry Moussay <pierre-henry.moussay@xxxxxxxxxxxxx>
CC: linux-riscv@xxxxxxxxxxxxxxxxxxx
CC: devicetree@xxxxxxxxxxxxxxx
CC: linux-kernel@xxxxxxxxxxxxxxx
---
arch/riscv/boot/dts/microchip/pic64gx.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/riscv/boot/dts/microchip/pic64gx.dtsi b/arch/riscv/boot/dts/microchip/pic64gx.dtsi
index 5cf3e3de0e067..5addfd4357117 100644
--- a/arch/riscv/boot/dts/microchip/pic64gx.dtsi
+++ b/arch/riscv/boot/dts/microchip/pic64gx.dtsi
@@ -494,7 +494,7 @@ gpio0: gpio@20120000 {
reg = <0x0 0x20120000 0x0 0x1000>;
interrupt-parent = <&irqmux>;
interrupt-controller;
- #interrupt-cells = <1>;
+ #interrupt-cells = <2>;
interrupts = <0>, <1>, <2>, <3>,
<4>, <5>, <6>, <7>,
<8>, <9>, <10>, <11>,
@@ -511,7 +511,7 @@ gpio1: gpio@20121000 {
reg = <0x0 0x20121000 0x0 0x1000>;
interrupt-parent = <&irqmux>;
interrupt-controller;
- #interrupt-cells = <1>;
+ #interrupt-cells = <2>;
interrupts = <32>, <33>, <34>, <35>,
<36>, <37>, <38>, <39>,
<40>, <41>, <42>, <43>,
@@ -530,7 +530,7 @@ gpio2: gpio@20122000 {
reg = <0x0 0x20122000 0x0 0x1000>;
interrupt-parent = <&irqmux>;
interrupt-controller;
- #interrupt-cells = <1>;
+ #interrupt-cells = <2>;
interrupts = <64>, <65>, <66>, <67>,
<68>, <69>, <70>, <71>,
<72>, <73>, <74>, <75>,
--
2.53.0