Re: [PATCH v2 02/13] arm64: dts: ti: k3-am642-phyboard-electra-rdk: fix USB clocking for compliance

From: Wadim Egorov

Date: Thu May 07 2026 - 09:03:09 EST




On 5/6/26 5:09 PM, Siddharth Vadapalli wrote:
> According to section "6.5.3 Normative Spread Spectrum Clocking (SSC)" of
> the USB 3.2 Specification, SSC should be enabled by default. This protects
> against EMI violations. Hence, enable internal SSC for USB SuperSpeed.
>
> Fixes: c48ac0efe6d7 ("arm64: dts: ti: Add support for phyBOARD-Electra-AM642")
> Cc: <stable@xxxxxxxxxxxxxxx>
> Signed-off-by: Siddharth Vadapalli <s-vadapalli@xxxxxx>

Acked-by: Wadim Egorov <w.egorov@xxxxxxxxx>

> ---
>
> v1:
> https://lore.kernel.org/r/20260505110631.1144200-3-s-vadapalli@xxxxxx/
> No changes since v1.
>
> arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts
> index 793538f94942..a85d7d08bd1b 100644
> --- a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts
> @@ -439,12 +439,21 @@ &sdhci1 {
> status = "okay";
> };
>
> +&serdes_wiz0 {
> + ti,core-clk-sel = <1>; /* Select internal reference clock */
> + ti,ssc-enable; /* Enable SSC */
> + ti,ssc-type = <1>; /* 1 for Downspread */
> + ti,ssc-frequency-hz = <33000>; /* 33 KHz */
> + ti,ssc-depth-per-mil = <5>; /* 0.5% depth */
> +};
> +
> &serdes0 {
> serdes0_pcie_usb_link: phy@0 {
> reg = <0>;
> cdns,num-lanes = <1>;
> #phy-cells = <0>;
> cdns,phy-type = <PHY_TYPE_USB3>;
> + cdns,ssc-mode = <2>; /* 2 for internal SSC */
> resets = <&serdes_wiz0 1>;
> };
> };