Re: [PATCH v3 1/9] perf/x86/intel: Ensure guest PEBS path doesn't set unwanted PERF_GLOBAL_CTRL bits

[Mi, Dapeng]

On 5/9/2026 7:13 AM, Sean Christopherson wrote:
> When reinstating PEBS counters into PERF_GLOBAL_CTRL for a KVM guest, mask
> the value with perf's desired/original PERF_GLOBAL_CTRL value to ensure
> KVM doesn't unintentionally enable counters.  This _should_ be a nop, as
> arr[pebs_enable].guest is derived from cpuc->pebs_enabled, which should be
> a subset of x86_pmu.intel_ctrl, but paranoia is cheap in this case.
>
> Signed-off-by: Sean Christopherson <seanjc@xxxxxxxxxx>
> ---
>  arch/x86/events/intel/core.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
> index d9488ade0f8e..b70dc35fcceb 100644
> --- a/arch/x86/events/intel/core.c
> +++ b/arch/x86/events/intel/core.c
> @@ -5066,7 +5066,7 @@ static struct perf_guest_switch_msr *intel_guest_get_msrs(int *nr, void *data)
>  		arr[pebs_enable].guest &= ~kvm_pmu->host_cross_mapped_mask;
>  		arr[global_ctrl].guest &= ~kvm_pmu->host_cross_mapped_mask;
>  		/* Set hw GLOBAL_CTRL bits for PEBS counter when it runs for guest */
> -		arr[global_ctrl].guest |= arr[pebs_enable].guest;
> +		arr[global_ctrl].guest |= intel_ctrl & arr[pebs_enable].guest;
>  	}
>  
>  	return arr;

The change looks good to me, but it's totally removed in next patch. Not
sure if it's worthy to do it.

Reviewed-by: Dapeng Mi <dapeng1.mi@xxxxxxxxxxxxxxx>