Re: [PATCH] x86/microcode: Fix comment in microcode_loader_disabled()

[Andrew Cooper]

> diff --git a/arch/x86/kernel/cpu/microcode/core.c
> b/arch/x86/kernel/cpu/microcode/core.c index
> 651202e6fefb..68a1a893246c 100644 ---
> a/arch/x86/kernel/cpu/microcode/core.c +++
> b/arch/x86/kernel/cpu/microcode/core.c @@ -126,7 +126,7 @@ bool __init
> microcode_loader_disabled(void)  	}
>  
>  	/*
> - * 2) Bit 31 in CPUID[1]:ECX is clear + * 2) Bit 31 in CPUID[1]:ECX
> is set  	 *    The bit is reserved for hypervisor use. This is still not
>  	 *    completely accurate as XEN PV guests don't see that CPUID bit
>  	 *    set, but that's good enough as they don't land on the BSP

The disposition of that bit isn't the only wrong thing.

That claim wasn't reviewed by anyone from Xen, and I don't even know
what "doesn't land on the BSP" is supposed to mean in context.

On AMD systems, the Hypervisor bit will always be present.  On any Intel
system since IvyBridge, the same is true.

But the logic is buggy and should use regular CPUID not native CPUID.

~Andrew