Re: [PATCH] arm64: dts: qcom: sm8750: Fix DSI1 phy reference clock rate

[Bjorn Andersson]

On Tue, 31 Mar 2026 18:56:46 +0200, Krzysztof Kozlowski wrote:
> The DSI PHY CXO clock input is the SoC CXO divided by two.  DSI0 already
> uses correct one, but DSI1 got copy-paste from SM8650.  Wrong clock
> parent will cause incorrect DSI1 PHY PLL frequencies to be used making
> the DSI panel non-working, although there is no upstream user of DSI1.
> 
> 

Applied, thanks!

[1/1] arm64: dts: qcom: sm8750: Fix DSI1 phy reference clock rate
      commit: f4d7c5875a215cd3989b59d13a9c30cec9f0a33b

Best regards,
-- 
Bjorn Andersson <andersson@xxxxxxxxxx>