Re: [PATCH v2 2/2] mailbox: qcom-cpucp: Add support for Nord CPUCP mailbox controller

[Jassi Brar]

On Sun, Apr 26, 2026 at 7:53 PM Shawn Guo
<shengchao.guo@xxxxxxxxxxxxxxxx> wrote:
>
> From: Deepti Jaggi <deepti.jaggi@xxxxxxxxxxxxxxxx>
>
> The Nord SoC CPUCP mailbox supports 16 IPC channels, compared to 3 on
> x1e80100. The existing driver hardcodes the channel count via a
> compile-time constant (APSS_CPUCP_IPC_CHAN_SUPPORTED), making it
> impossible to support hardware with a different number of channels.
>
> Introduce a qcom_cpucp_mbox_data per-hardware configuration struct that
> carries the channel count, and retrieve it via of_device_get_match_data()
> at probe time. Switch the channel array from a fixed-size member to a
> dynamically allocated buffer sized from the hardware data. Update the
> x1e80100 entry to supply its own data struct, and add a new Nord entry
> with num_chans = 16.
>
> Signed-off-by: Deepti Jaggi <deepti.jaggi@xxxxxxxxxxxxxxxx>
> Signed-off-by: Shawn Guo <shengchao.guo@xxxxxxxxxxxxxxxx>
> ---
>  drivers/mailbox/qcom-cpucp-mbox.c | 35 ++++++++++++++++++++++++++-----
>  1 file changed, 30 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/mailbox/qcom-cpucp-mbox.c b/drivers/mailbox/qcom-cpucp-mbox.c
> index 44f4ed15f818..862e45e8fbd5 100644
> --- a/drivers/mailbox/qcom-cpucp-mbox.c
> +++ b/drivers/mailbox/qcom-cpucp-mbox.c
> @@ -12,7 +12,6 @@
>  #include <linux/module.h>
>  #include <linux/platform_device.h>
>
> -#define APSS_CPUCP_IPC_CHAN_SUPPORTED          3
>  #define APSS_CPUCP_MBOX_CMD_OFF                        0x4
>
>  /* Tx Registers */
> @@ -26,6 +25,14 @@
>  #define APSS_CPUCP_RX_MBOX_EN                  0x4c00
>  #define APSS_CPUCP_RX_MBOX_CMD_MASK            GENMASK_ULL(63, 0)
>
> +/**
> + * struct qcom_cpucp_mbox_data - Per-hardware mailbox configuration data
> + * @num_chans:                 Number of IPC channels supported by this hardware
> + */
> +struct qcom_cpucp_mbox_data {
> +       int num_chans;
> +};
> +
>  /**
>   * struct qcom_cpucp_mbox - Holder for the mailbox driver
>   * @chans:                     The mailbox channel
> @@ -34,7 +41,7 @@
>   * @rx_base:                   Base address of the CPUCP rx registers
>   */
>  struct qcom_cpucp_mbox {
> -       struct mbox_chan chans[APSS_CPUCP_IPC_CHAN_SUPPORTED];
> +       struct mbox_chan *chans;
>         struct mbox_controller mbox;
>         void __iomem *tx_base;
>         void __iomem *rx_base;
> @@ -53,7 +60,7 @@ static irqreturn_t qcom_cpucp_mbox_irq_fn(int irq, void *data)
>
>         status = readq(cpucp->rx_base + APSS_CPUCP_RX_MBOX_STAT);
>
> -       for_each_set_bit(i, (unsigned long *)&status, APSS_CPUCP_IPC_CHAN_SUPPORTED) {
> +       for_each_set_bit(i, (unsigned long *)&status, cpucp->mbox.num_chans) {
>                 u32 val = readl(cpucp->rx_base + APSS_CPUCP_RX_MBOX_CMD(i) + APSS_CPUCP_MBOX_CMD_OFF);
>                 struct mbox_chan *chan = &cpucp->chans[i];
>                 unsigned long flags;
> @@ -112,15 +119,24 @@ static const struct mbox_chan_ops qcom_cpucp_mbox_chan_ops = {
>
>  static int qcom_cpucp_mbox_probe(struct platform_device *pdev)
>  {
> +       const struct qcom_cpucp_mbox_data *data;
>         struct device *dev = &pdev->dev;
>         struct qcom_cpucp_mbox *cpucp;
>         struct mbox_controller *mbox;
>         int irq, ret;
>
> +       data = of_device_get_match_data(dev);
> +       if (!data)
> +               return dev_err_probe(dev, -EINVAL, "No match data found\n");
> +
>         cpucp = devm_kzalloc(dev, sizeof(*cpucp), GFP_KERNEL);
>         if (!cpucp)
>                 return -ENOMEM;
>
> +       cpucp->chans = devm_kcalloc(dev, data->num_chans, sizeof(*cpucp->chans), GFP_KERNEL);
> +       if (!cpucp->chans)
> +               return -ENOMEM;
> +
>         cpucp->rx_base = devm_of_iomap(dev, dev->of_node, 0, NULL);
>         if (IS_ERR(cpucp->rx_base))
>                 return PTR_ERR(cpucp->rx_base);
> @@ -146,7 +162,7 @@ static int qcom_cpucp_mbox_probe(struct platform_device *pdev)
>
>         mbox = &cpucp->mbox;
>         mbox->dev = dev;
> -       mbox->num_chans = APSS_CPUCP_IPC_CHAN_SUPPORTED;
> +       mbox->num_chans = data->num_chans;
>         mbox->chans = cpucp->chans;
>         mbox->ops = &qcom_cpucp_mbox_chan_ops;
>
> @@ -157,8 +173,17 @@ static int qcom_cpucp_mbox_probe(struct platform_device *pdev)
>         return 0;
>  }
>
> +static const struct qcom_cpucp_mbox_data qcom_x1e80100_mbox_data = {
> +       .num_chans = 3,
> +};
> +
> +static const struct qcom_cpucp_mbox_data qcom_nord_mbox_data = {
> +       .num_chans = 16,
> +};
> +
>  static const struct of_device_id qcom_cpucp_mbox_of_match[] = {
> -       { .compatible = "qcom,x1e80100-cpucp-mbox" },
> +       { .compatible = "qcom,nord-cpucp-mbox", .data = &qcom_nord_mbox_data },
> +       { .compatible = "qcom,x1e80100-cpucp-mbox", .data = &qcom_x1e80100_mbox_data },
>         {}
>  };
>  MODULE_DEVICE_TABLE(of, qcom_cpucp_mbox_of_match);
> --
> 2.43.0
>
Applied to mailbox/for-next
Thanks
Jassi