[PATCH 2/8] KVM: selftests: Move GPR load/save definitions outside of nSVM code
From: Yosry Ahmed
Date: Mon May 18 2026 - 16:26:21 EST
From: Yosry Ahmed <yosryahmed@xxxxxxxxxx>
In preparation for reusing the code for nVMX tests, move the definitions
for GPRs switching to processor.h.
No functional change intended.
Signed-off-by: Yosry Ahmed <yosry@xxxxxxxxxx>
---
.../selftests/kvm/include/x86/processor.h | 42 +++++++++++++++++++
.../testing/selftests/kvm/lib/x86/processor.c | 2 +
tools/testing/selftests/kvm/lib/x86/svm.c | 41 ------------------
3 files changed, 44 insertions(+), 41 deletions(-)
diff --git a/tools/testing/selftests/kvm/include/x86/processor.h b/tools/testing/selftests/kvm/include/x86/processor.h
index 1482f2b53a9c5..8e4eab84b91bc 100644
--- a/tools/testing/selftests/kvm/include/x86/processor.h
+++ b/tools/testing/selftests/kvm/include/x86/processor.h
@@ -397,6 +397,48 @@ struct gpr64_regs {
u64 r15;
};
+extern struct gpr64_regs guest_regs;
+
+#define DEFINE_ASM_GPR64_OFFSET(reg) \
+ asm(".equ GPR64_OFF_" #reg ", %c0" : : "i"(offsetof(struct gpr64_regs, reg)))
+
+DEFINE_ASM_GPR64_OFFSET(rbx);
+DEFINE_ASM_GPR64_OFFSET(rcx);
+DEFINE_ASM_GPR64_OFFSET(rdx);
+DEFINE_ASM_GPR64_OFFSET(rbp);
+DEFINE_ASM_GPR64_OFFSET(rsi);
+DEFINE_ASM_GPR64_OFFSET(rdi);
+DEFINE_ASM_GPR64_OFFSET(r8);
+DEFINE_ASM_GPR64_OFFSET(r9);
+DEFINE_ASM_GPR64_OFFSET(r10);
+DEFINE_ASM_GPR64_OFFSET(r11);
+DEFINE_ASM_GPR64_OFFSET(r12);
+DEFINE_ASM_GPR64_OFFSET(r13);
+DEFINE_ASM_GPR64_OFFSET(r14);
+DEFINE_ASM_GPR64_OFFSET(r15);
+
+#define GUEST_SWITCH_GPR_ASM(reg) \
+ "xchg %%" #reg ", guest_regs + GPR64_OFF_" #reg "\n\t"
+/*
+ * save/restore 64-bit general registers except rax, rip, rsp
+ * which are directly handed through the VMCB guest processor state
+ */
+#define GUEST_SWITCH_GPRS_NORAX_ASM \
+ GUEST_SWITCH_GPR_ASM(rbx) \
+ GUEST_SWITCH_GPR_ASM(rcx) \
+ GUEST_SWITCH_GPR_ASM(rdx) \
+ GUEST_SWITCH_GPR_ASM(rbp) \
+ GUEST_SWITCH_GPR_ASM(rsi) \
+ GUEST_SWITCH_GPR_ASM(rdi) \
+ GUEST_SWITCH_GPR_ASM(r8) \
+ GUEST_SWITCH_GPR_ASM(r9) \
+ GUEST_SWITCH_GPR_ASM(r10) \
+ GUEST_SWITCH_GPR_ASM(r11) \
+ GUEST_SWITCH_GPR_ASM(r12) \
+ GUEST_SWITCH_GPR_ASM(r13) \
+ GUEST_SWITCH_GPR_ASM(r14) \
+ GUEST_SWITCH_GPR_ASM(r15)
+
struct desc64 {
u16 limit0;
u16 base0;
diff --git a/tools/testing/selftests/kvm/lib/x86/processor.c b/tools/testing/selftests/kvm/lib/x86/processor.c
index b51467d70f6e7..caefcd12df8d2 100644
--- a/tools/testing/selftests/kvm/lib/x86/processor.c
+++ b/tools/testing/selftests/kvm/lib/x86/processor.c
@@ -29,6 +29,8 @@ bool host_cpu_is_amd_compatible;
bool is_forced_emulation_enabled;
u64 guest_tsc_khz;
+struct gpr64_regs guest_regs;
+
const char *ex_str(int vector)
{
switch (vector) {
diff --git a/tools/testing/selftests/kvm/lib/x86/svm.c b/tools/testing/selftests/kvm/lib/x86/svm.c
index 6a6926b3b9d7c..b4d1a00dbe27f 100644
--- a/tools/testing/selftests/kvm/lib/x86/svm.c
+++ b/tools/testing/selftests/kvm/lib/x86/svm.c
@@ -13,7 +13,6 @@
#define SEV_DEV_PATH "/dev/sev"
-struct gpr64_regs guest_regs;
u64 rflags;
/* Allocate memory regions for nested SVM tests.
@@ -131,46 +130,6 @@ void generic_svm_setup(struct svm_test_data *svm, void *guest_rip, void *guest_r
}
}
-#define DEFINE_ASM_GPR64_OFFSET(reg) \
- asm(".equ GPR64_OFF_" #reg ", %c0" : : "i"(offsetof(struct gpr64_regs, reg)))
-
-DEFINE_ASM_GPR64_OFFSET(rbx);
-DEFINE_ASM_GPR64_OFFSET(rcx);
-DEFINE_ASM_GPR64_OFFSET(rdx);
-DEFINE_ASM_GPR64_OFFSET(rbp);
-DEFINE_ASM_GPR64_OFFSET(rsi);
-DEFINE_ASM_GPR64_OFFSET(rdi);
-DEFINE_ASM_GPR64_OFFSET(r8);
-DEFINE_ASM_GPR64_OFFSET(r9);
-DEFINE_ASM_GPR64_OFFSET(r10);
-DEFINE_ASM_GPR64_OFFSET(r11);
-DEFINE_ASM_GPR64_OFFSET(r12);
-DEFINE_ASM_GPR64_OFFSET(r13);
-DEFINE_ASM_GPR64_OFFSET(r14);
-DEFINE_ASM_GPR64_OFFSET(r15);
-
-#define GUEST_SWITCH_GPR_ASM(reg) \
- "xchg %%" #reg ", guest_regs + GPR64_OFF_" #reg "\n\t"
-/*
- * save/restore 64-bit general registers except rax, rip, rsp
- * which are directly handed through the VMCB guest processor state
- */
-#define GUEST_SWITCH_GPRS_NORAX_ASM \
- GUEST_SWITCH_GPR_ASM(rbx) \
- GUEST_SWITCH_GPR_ASM(rcx) \
- GUEST_SWITCH_GPR_ASM(rdx) \
- GUEST_SWITCH_GPR_ASM(rbp) \
- GUEST_SWITCH_GPR_ASM(rsi) \
- GUEST_SWITCH_GPR_ASM(rdi) \
- GUEST_SWITCH_GPR_ASM(r8) \
- GUEST_SWITCH_GPR_ASM(r9) \
- GUEST_SWITCH_GPR_ASM(r10) \
- GUEST_SWITCH_GPR_ASM(r11) \
- GUEST_SWITCH_GPR_ASM(r12) \
- GUEST_SWITCH_GPR_ASM(r13) \
- GUEST_SWITCH_GPR_ASM(r14) \
- GUEST_SWITCH_GPR_ASM(r15)
-
/*
* selftests do not use interrupts so we dropped clgi/sti/cli/stgi
* for now. registers involved in GPRs switching are eventually
--
2.54.0.563.g4f69b47b94-goog