Re: [PATCH 10/11] perf/x86/intel: Update event constraints and cache_extra_regs[] for SRF

[Mi, Dapeng]

On 5/20/2026 6:23 AM, Chen, Zide wrote:
>
> On 5/15/2026 11:11 PM, Dapeng Mi wrote:
>> Update perf hard-coded event constraints and cache_extra_regs[] for
>> Sierra Forest according to the latest SRF perfmon events (V1.17).
>>
>> SRF has same uarch (crestmont) as MTL E-core and shares same perf
>> events, so directly apply the crestmont perf events.
> Nit: Crestmont.

Sure. Thanks.


>> SRF perfmon events:
>> https://github.com/intel/perfmon/blob/main/SRF/events/sierraforest_core.json
>>
>> Signed-off-by: Dapeng Mi <dapeng1.mi@xxxxxxxxxxxxxxx>
>> ---
> Reviewed-by: zide.chen@xxxxxxxxx
>
>>  arch/x86/events/intel/core.c | 3 +--
>>  1 file changed, 1 insertion(+), 2 deletions(-)
>>
>> diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
>> index 587167dbb98f..e1c6fb127f10 100644
>> --- a/arch/x86/events/intel/core.c
>> +++ b/arch/x86/events/intel/core.c
>> @@ -8101,8 +8101,7 @@ __init int intel_pmu_init(void)
>>  
>>  	case INTEL_ATOM_CRESTMONT:
>>  	case INTEL_ATOM_CRESTMONT_X:
>> -		intel_pmu_init_grt(NULL);
>> -		x86_pmu.extra_regs = intel_cmt_extra_regs;
>> +		intel_pmu_init_cmt(NULL);
>>  		intel_pmu_pebs_data_source_cmt();
>>  		x86_pmu.pebs_latency_data = cmt_latency_data;
>>  		x86_pmu.get_event_constraints = cmt_get_event_constraints;