Re: [PATCH v6 3/3] PCI: cadence: Add LGA IP debugfs for LTSSM status

[Aksh Garg]

On 20/05/26 08:29, Hans Zhang wrote:
> On 5/20/26 10:34, Manikandan Karunakaran Pillai wrote:
> > > EXTERNAL MAIL
> > >
> > >
> > > Extend debugfs support to LGA-based Cadence PCIe controllers. The
> > > 'ltssm_status' file now works for both HPA and LGA IP by selecting the
> > > appropriate register access based on the 'is_hpa' flag.
> > >
> > > Signed-off-by: Hans Zhang <18255117159@xxxxxxx>
> > > ---
> > > .../controller/cadence/pcie-cadence-debugfs.c | 61 ++++++++++++++++++-
> > > .../pci/controller/cadence/pcie-cadence-ep.c  |  3 +
> > > .../controller/cadence/pcie-cadence-host.c    |  9 ++-
> > > drivers/pci/controller/cadence/pcie-cadence.h | 43 +++++++++++++
> > > 4 files changed, 112 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/drivers/pci/controller/cadence/pcie-cadence-debugfs.c
> > > b/drivers/pci/controller/cadence/pcie-cadence-debugfs.c
> > > index 97c5deef2b1a..0a308f95e9f6 100644
> > > --- a/drivers/pci/controller/cadence/pcie-cadence-debugfs.c
> > > +++ b/drivers/pci/controller/cadence/pcie-cadence-debugfs.c
> > > @@ -13,6 +13,58 @@
> > >
> > > #define CDNS_DEBUGFS_BUF_MAX        128
> >
> > Where is CDNS_DEBUGFS_BUF_MAX used for ?
>
> Hi Manikandan,
>
> Thank you very much for your reply and reminder.
>
> This macro definition was used in patch 0002. Since I compiled the code 
> after applying all three patches together, I didn't notice this issue. 
> The next version will be fixed and will be included in patch 0002.

I didn't understood the issue here. The macro definition was indeed 
introduced in patch 0002 itself right? Am I missing something here?

> Best regards,
> Hans