Re: [PATCH 1/2] dt-bindings: soc: qcom: Document CDSP Power Management

From: Konrad Dybcio

Date: Wed May 20 2026 - 05:59:24 EST


On 5/19/26 9:05 PM, Vignesh Viswanathan wrote:
> Add documentation for the CDSP Power Management driver, which handles
> Dynamic Clock and Voltage Scaling (DCVS) requests via SMEM, manages Low
> Power Mode (LPM) transitions via MPM handshake, and provides virtual
> regulators for the remoteproc driver to control CDSP power rails.
>
> Signed-off-by: Vignesh Viswanathan <vignesh.viswanathan@xxxxxxxxxxxxxxxx>
> ---

[...]

> +maintainers:
> + - Vignesh Viswanathan <vignesh.viswanathan@xxxxxxxxxxxxxxxx>
> +
> +description:
> + The CDSP Power Management driver provides power management services for the
> + Qualcomm Compute DSP (CDSP) subsystem. It handles Dynamic Clock and Voltage
> + Scaling (DCVS) requests via SMEM, manages Low Power Mode (LPM) transitions
> + via MPM handshake, and provides virtual regulators that are consumed by the
> + CDSP remoteproc driver.
> +
> +properties:
> + compatible:
> + const: qcom,cdsp-power

This really needs to be SoC-specific

> +
> + reg:
> + items:
> + - description: MPM (Modem Power Manager) register region
> + - description: RSCC (RSC Configuration) register region

I was under the impression that these two belong to separate
universes..

> + vdd-cx-supply:
> + description:
> + Phandle to the CX voltage regulator. This is the actual hardware regulator
> + (e.g., from MP8899 PMIC) that supplies power to the CDSP CX rail.

I believe the second sentence is wholly redundant

[...]

> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/interrupt-controller/irq.h>
> + #include <dt-bindings/mailbox/qcom-ipcc.h>
> +
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + cdsp_power: cdsp-power@4ae000 {
> + compatible = "qcom,cdsp-power";
> + reg = <0x0 0x004ae000 0x0 0x1000>,

MPM is a top-level peripheral, but this is a slice dedicated to the
CDSP so maybe it'd pass, but..

> + <0x0 0x26018018 0x0 0x4>;

This is a single random register within the CDSP's register space, so
we should definitely be able to describe this better..

Konrad