Re: [PATCH 2/3] arm64: dts: qcom: monaco-monza-som: Enable USB0 DRD mode
From: Dmitry Baryshkov
Date: Wed May 20 2026 - 06:12:18 EST
On Wed, May 20, 2026 at 03:07:33PM +0530, Akash Kumar wrote:
> Enable USB0 dual-role mode on monza SOM using the Cypress CYPD6129 UCSI
> controller.
>
> Switch the controller node to I2C12, configure the required pinctrl and
> interrupt settings, and wire the USB2/USB3 endpoints for the USB-C
> connector.
>
> Signed-off-by: Akash Kumar <akash.kumar@xxxxxxxxxxxxxxxx>
> ---
> .../arm64/boot/dts/qcom/monaco-monza-som.dtsi | 57 +++++++++++++++++++
> 1 file changed, 57 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi b/arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi
> index 9b5ed55939b8..8e3af6018dfc 100644
> --- a/arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi
> +++ b/arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi
> @@ -194,6 +194,52 @@ &iris {
> status = "okay";
> };
>
> +&i2c12 {
Wrong place.
> + pinctrl-0 = <&qup_i2c12_data_clk>, <&usb0_intr_state>;
> + pinctrl-names = "default";
> + status = "okay";
> +
> + typec@8 {
> + compatible = "cypress,cypd6129";
> + reg = <0x08>;
> + interrupt-parent = <&tlmm>;
Is interrupt-parent required?
> + interrupts = < 3 IRQ_TYPE_LEVEL_LOW>;
Extra whitespace
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
--
With best wishes
Dmitry