Re: RFC: CXL: How to handle trace event ABI break from CXL_HEADERLOG_SIZE fix?

From: Bowman, Terry

Date: Thu May 21 2026 - 08:30:31 EST


On 5/20/2026 5:18 PM, Dan Williams (nvidia) wrote:
> Bowman, Terry wrote:
>> Hi Mauro and Everyone,
>>
>> During development of the CXL protocol series [1], the Sashiko tool
>> identified an issue in the CXL RAS UCE trace logging for Ports and Endpoints.
>> Specifically, the CXL RAS UCE header log size is incorrectly defined in
>> drivers/cxl/cxl.h.
>>
>> The UCE header log size is currently defined as 128 u32s (512 bytes),
>> whereas it should be 16 u32s (64 bytes) per CXL r4.0 8.2.4.17.7. Correcting
>> this will change the trace format and break the existing ABI contract
>> with rasdaemon.
>>
>> How would you recommend proceeding to resolve this?
>
> Split the definitions into one that reads from the register space and
> once that passes the parsed log to the trace buffer.
>
> Something like:
>
> u32 hl[CXL_HEADERLOG_TRACE_SIZE_U32];
>
> ...zero-fill that and put a comment about how userspace has already
> grown a dependency on the buggy size.
>
> In other words, keep the userspace compatibility, but fix the iomem
> overflow.

Ok, that's straight forward. Thanks.

- Terry