[PATCH 14/18] arm64: dts: qcom: monaco: Fix PCIe wake GPIO polarity
From: Krishna Chaitanya Chundru
Date: Thu May 21 2026 - 09:31:30 EST
The PCIe WAKE# signal is active-low as defined in the PCIe Base
Specification. Fix the wake-gpios polarity by using GPIO_ACTIVE_LOW
instead of GPIO_ACTIVE_HIGH.
Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@xxxxxxxxxxxxxxxx>
Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxxxx>
Reviewed-by: Manivannan Sadhasivam <mani@xxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/monaco-evk.dts | 4 ++--
arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/monaco-evk.dts b/arch/arm64/boot/dts/qcom/monaco-evk.dts
index 9d17ef7d2caf..b30fc7ecdf32 100644
--- a/arch/arm64/boot/dts/qcom/monaco-evk.dts
+++ b/arch/arm64/boot/dts/qcom/monaco-evk.dts
@@ -643,12 +643,12 @@ &pcie1_phy {
&pcieport0 {
reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
- wake-gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
+ wake-gpios = <&tlmm 0 GPIO_ACTIVE_LOW>;
};
&pcieport1 {
reset-gpios = <&tlmm 23 GPIO_ACTIVE_LOW>;
- wake-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
+ wake-gpios = <&tlmm 21 GPIO_ACTIVE_LOW>;
};
&pmm8620au_0_gpios {
diff --git a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts
index e9a8553a8d82..f9891fbcca90 100644
--- a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts
+++ b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts
@@ -615,7 +615,7 @@ &pcie0 {
&pcieport0 {
reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
- wake-gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
+ wake-gpios = <&tlmm 0 GPIO_ACTIVE_LOW>;
wifi@0 {
compatible = "pci17cb,1103";
@@ -651,7 +651,7 @@ &pcie1 {
&pcieport1 {
reset-gpios = <&tlmm 23 GPIO_ACTIVE_LOW>;
- wake-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
+ wake-gpios = <&tlmm 21 GPIO_ACTIVE_LOW>;
};
&pcie1_phy {
--
2.34.1