Re: [PATCH v4 0/2] x86/tsc: Exempt recent UV systems from clocksource watchdog checks to avoid false positives.

[Thomas Gleixner]

On Thu, May 21 2026 at 08:17, Dimitri Sivanich wrote:
> HPE UV hardware and firmware is designed to ensure a reliable and
> synchronized TSC mechanism.  Comparing the TSC against secondary
> clocksources can result in false positives due to variable access
> latency caused by system traffic.  The best course of action against
> these false positives has been found to simply disable watchdog
> checking of the TSC.
>
> Commits [1] and [2] were introduced to avoid an issue where the TSC
> is falsely declared unstable by exempting qualified platforms of up
> to 4-sockets from TSC clocksource watchdog checking.  Extend that
> exemption to include recent and future UV platforms.

Jiri asked you in the V3 submission:

 "A new implementation of the clocksource watchdog has been merged into
  the upstream kernel. One of the changes made by the new clocksource
  watchdog implementation is that reference clocksource reads are made
  on the boot CPU only. Perhaps, the sgi_rtc clocksource would work well
  with this implementation. So, testing is needed in order to find out
  if this patch are any future in the upstream Linux. Dimitri, would you
  be able to run tests on UV systems to check if the new clocksource
  watchdog implementation works and the hardware limitations of sgi_rtc
  do not get in the way?"

This question is still not answered by you and it has been confirmed
that the new watchdog works flawlessly on a 1920 threads 16 socket
system under massive load and system traffic.

So you do not even have the courtesy to test, you just go and make the
same claims you made before based on the original watchdog
implementation.

Feel free to ignore people, but then don't be surprised when people
ignore you as well.

Thanks,

        tglx