[PATCH 1/2] dt-bindings: interconnect: qcom,shikra-epss-l3: Add EPSS L3 DT binding

[Raviteja Laggyshetty]

Document the EPSS L3 interconnect provider binding for Qualcomm
Shikra SoC.

The Shikra EPSS L3 block is similar to existing Qualcomm EPSS/OSM L3
providers, but supports only up to 12 frequency lookup table entries.
Introduce Shikra specific bindings to represent this constrained
EPSS variant.

Co-developed-by: Odelu Kukatla <odelu.kukatla@xxxxxxxxxxxxxxxx>
Signed-off-by: Odelu Kukatla <odelu.kukatla@xxxxxxxxxxxxxxxx>
Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@xxxxxxxxxxxxxxxx>
---
 .../bindings/interconnect/qcom,shikra-epss-l3.yaml | 60 ++++++++++++++++++++++
 1 file changed, 60 insertions(+)

diff --git a/Documentation/devicetree/bindings/interconnect/qcom,shikra-epss-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,shikra-epss-l3.yaml
new file mode 100644
index 000000000000..333ed40ea8e9
--- /dev/null
+++ b/Documentation/devicetree/bindings/interconnect/qcom,shikra-epss-l3.yaml
@@ -0,0 +1,60 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interconnect/qcom,shikra-epss-l3.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Epoch Subsystem (EPSS) L3 Shikra Interconnect Provider
+
+maintainers:
+  - Raviteja Laggyshetty <raviteja.laggyshetty@xxxxxxxxxxxxxxxx>
+
+description:
+  L3 cache bandwidth requirements on Qualcomm SoCs is serviced by the EPSS.
+  The EPSS L3 interconnect provider aggregates the L3 bandwidth requests
+  from CPU/GPU and relays it to the EPSS HW.
+
+  The Qualcomm Shikra SoC EPSS L3 supports up to twelve frequency lookup
+  table (LUT) entries.
+
+properties:
+  compatible:
+    enum:
+      - qcom,shikra-epss-l3
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    items:
+      - description: xo clock
+      - description: alternate clock
+
+  clock-names:
+    items:
+      - const: xo
+      - const: alternate
+
+  '#interconnect-cells':
+    const: 1
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+  - '#interconnect-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    epss_l3: interconnect@fd90000 {
+      compatible = "qcom,shikra-epss-l3";
+      reg = <0xfd90000 0x1000>;
+
+      clocks = <&rpm_smd_xo_clk_src>, <&gpll0>;
+      clock-names = "xo", "alternate";
+
+      #interconnect-cells = <1>;
+    };

-- 
2.43.0