Re: [PATCH v4 17/27] rust: pci: make Bar lifetime-parameterized

[Gary Guo]

On Mon May 25, 2026 at 5:37 AM BST, Eliot Courtney wrote:
> On Fri May 22, 2026 at 8:34 AM JST, Danilo Krummrich wrote:
>> Convert pci::Bar<SIZE> to pci::Bar<'a, SIZE>, storing &'a Device<Bound>
>> to tie the BAR mapping lifetime to the device.
>>
>> iomap_region_sized() now returns Result<Bar<'a, SIZE>> directly instead
>> of impl PinInit<Devres<Bar<SIZE>>, Error>.
>>
>> Add Bar::into_devres() to consume the bar and register it as a
>> device-managed resource, returning Devres<Bar<'static, SIZE>>. The
>> lifetime is erased to 'static because Devres guarantees the bar does not
>> actually outlive the device -- access is revoked on unbind.
>>
>> Reviewed-by: Eliot Courtney <ecourtney@xxxxxxxxxx>
>> Signed-off-by: Danilo Krummrich <dakr@xxxxxxxxxx>
>> ---
>>  drivers/gpu/nova-core/driver.rs |  7 +++--
>>  rust/kernel/devres.rs           |  2 +-
>>  rust/kernel/pci/io.rs           | 50 ++++++++++++++++++---------------
>>  samples/rust/rust_driver_pci.rs |  5 ++--
>>  4 files changed, 35 insertions(+), 29 deletions(-)
>>
>> diff --git a/drivers/gpu/nova-core/driver.rs b/drivers/gpu/nova-core/driver.rs
>> index 6ad1a856694c..7dbec0470c26 100644
>> --- a/drivers/gpu/nova-core/driver.rs
>> +++ b/drivers/gpu/nova-core/driver.rs
>> @@ -45,7 +45,7 @@ pub(crate) struct NovaCore {
>>  // DMA addresses. These systems should be quite rare.
>>  const GPU_DMA_BITS: u32 = 47;
>>  
>> -pub(crate) type Bar0 = pci::Bar<BAR0_SIZE>;
>> +pub(crate) type Bar0 = pci::Bar<'static, BAR0_SIZE>;
>>  
>>  kernel::pci_device_table!(
>>      PCI_TABLE,
>> @@ -92,8 +92,9 @@ fn probe<'bound>(
>>              // other threads of execution.
>>              unsafe { pdev.dma_set_mask_and_coherent(DmaMask::new::<GPU_DMA_BITS>())? };
>>  
>> -            let bar = Arc::pin_init(
>> -                pdev.iomap_region_sized::<BAR0_SIZE>(0, c"nova-core/bar0"),
>> +            let bar = Arc::new(
>> +                pdev.iomap_region_sized::<BAR0_SIZE>(0, c"nova-core/bar0")?
>> +                    .into_devres()?,
>>                  GFP_KERNEL,
>>              )?;
>>  
>> diff --git a/rust/kernel/devres.rs b/rust/kernel/devres.rs
>> index fd4633f977f6..82cbd8b969fb 100644
>> --- a/rust/kernel/devres.rs
>> +++ b/rust/kernel/devres.rs
>> @@ -304,7 +304,7 @@ pub fn device(&self) -> &Device {
>>      ///     pci, //
>>      /// };
>>      ///
>> -    /// fn from_core(dev: &pci::Device<Core<'_>>, devres: Devres<pci::Bar<0x4>>) -> Result {
>> +    /// fn from_core(dev: &pci::Device<Core<'_>>, devres: Devres<pci::Bar<'_, 0x4>>) -> Result {
>>      ///     let bar = devres.access(dev.as_ref())?;
>>      ///
>>      ///     let _ = bar.read32(0x0);
>> diff --git a/rust/kernel/pci/io.rs b/rust/kernel/pci/io.rs
>> index ae78676c927f..6116c55412bc 100644
>> --- a/rust/kernel/pci/io.rs
>> +++ b/rust/kernel/pci/io.rs
>> @@ -14,8 +14,7 @@
>>          Mmio,
>>          MmioRaw, //
>>      },
>> -    prelude::*,
>> -    sync::aref::ARef, //
>> +    prelude::*, //
>>  };
>>  use core::{
>>      marker::PhantomData,
>> @@ -146,14 +145,14 @@ impl<'a, S: ConfigSpaceKind> IoKnownSize for ConfigSpace<'a, S> {
>>  ///
>>  /// `Bar` always holds an `IoRaw` instance that holds a valid pointer to the start of the I/O
>>  /// memory mapped PCI BAR and its size.
>> -pub struct Bar<const SIZE: usize = 0> {
>> -    pdev: ARef<Device>,
>> +pub struct Bar<'a, const SIZE: usize = 0> {
>> +    pdev: &'a Device<device::Bound>,
>>      io: MmioRaw<SIZE>,
>>      num: i32,
>>  }
>>  
>> -impl<const SIZE: usize> Bar<SIZE> {
>> -    pub(super) fn new(pdev: &Device, num: u32, name: &CStr) -> Result<Self> {
>> +impl<'a, const SIZE: usize> Bar<'a, SIZE> {
>> +    pub(super) fn new(pdev: &'a Device<device::Bound>, num: u32, name: &CStr) -> Result<Self> {
>
> I think Sashiko's comment w.r.t. &CStrs in this patch looks accurate
> and they should be 'static or at least 'a ish.

It needs to be `'static` to be leak-safe.

Best,
Gary