Re: [PATCH 2/2] reset: spacemit: k3: fix USB2 ahb reset

[Yixun Lan]

Hi Philipp Zabel,

On 02:58 Mon 18 May     , Yixun Lan wrote:
> According to SpacemiT K3's updated docs, the USB2 ahb reset and USB2 bus
> clock enable bit was wrongly swapped, the correct one should be:
> 
> Register : APMU_USB_CLK_RES_CTRL
> bit[1]   : usb2_port_bus_clk_en
> bit[0]   : usb2_port_ahb_rstn
> 
> Fixes: a0e0c2f8c5f3 ("reset: spacemit: k3: Decouple composite reset lines")
> Reported-by: Junzhong Pan <panjunzhong@xxxxxxxxxxxxxxxxxx>
> Signed-off-by: Yixun Lan <dlan@xxxxxxxxxx>

Would be it ok from your side to queue this patch for v7.2 cycle?
or do you want me to combine it and go via clk tree when sending PR to
Stephen? I think as long as they are accepted in same cycle, then should
be no problem, otherwise will result a broken USB2 driver.

P.S, we will activate USB2 driver for K3 in v7.2, so kicking this in
same cycle should be a good reason, no necessary to rush for v7.1 fix..

> ---
>  drivers/reset/spacemit/reset-spacemit-k3.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/reset/spacemit/reset-spacemit-k3.c b/drivers/reset/spacemit/reset-spacemit-k3.c
> index 9841f5e057b2..2e87f320cf11 100644
> --- a/drivers/reset/spacemit/reset-spacemit-k3.c
> +++ b/drivers/reset/spacemit/reset-spacemit-k3.c
> @@ -112,7 +112,7 @@ static const struct ccu_reset_data k3_apmu_resets[] = {
>  	[RESET_APMU_SDH0]	= RESET_DATA(APMU_SDH0_CLK_RES_CTRL,	0, BIT(1)),
>  	[RESET_APMU_SDH1]	= RESET_DATA(APMU_SDH1_CLK_RES_CTRL,	0, BIT(1)),
>  	[RESET_APMU_SDH2]	= RESET_DATA(APMU_SDH2_CLK_RES_CTRL,	0, BIT(1)),
> -	[RESET_APMU_USB2_AHB]	= RESET_DATA(APMU_USB_CLK_RES_CTRL,	0, BIT(1)),
> +	[RESET_APMU_USB2_AHB]	= RESET_DATA(APMU_USB_CLK_RES_CTRL,	0, BIT(0)),
>  	[RESET_APMU_USB2_VCC]	= RESET_DATA(APMU_USB_CLK_RES_CTRL,	0, BIT(2)),
>  	[RESET_APMU_USB2_PHY]	= RESET_DATA(APMU_USB_CLK_RES_CTRL,	0, BIT(3)),
>  	[RESET_APMU_USB3_A_AHB]	= RESET_DATA(APMU_USB_CLK_RES_CTRL,	0, BIT(5)),
> 
> -- 
> 2.54.0
> 

-- 
Yixun Lan (dlan)