[PATCH v2 1/3] dt-bindings: i2c: Add StarFive JHB100 I2C

[lianfeng.ouyang]

From: Lianfeng Ouyang <lianfeng.ouyang@xxxxxxxxxxxxxxxx>

Add device tree bindings for the Starfive I2C controller
and its implementation

The binding defines two platform-specific compatibles for the StarFive
JHB100 implementation:
- "starfive,jhb100-i2c-master"
- "starfive,jhb100-i2c-slave"

The controller supports standard I2C and SMBus protocols, programmable
FIFO depths, and optional SMBus Alert routing. The binding documents
the necessary clocks, resets, and timing properties.

Signed-off-by: Lianfeng Ouyang <lianfeng.ouyang@xxxxxxxxxxxxxxxx>
---
 .../bindings/i2c/starfive,jhb100-i2c.yaml     | 128 ++++++++++++++++++
 1 file changed, 128 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/i2c/starfive,jhb100-i2c.yaml

diff --git a/Documentation/devicetree/bindings/i2c/starfive,jhb100-i2c.yaml b/Documentation/devicetree/bindings/i2c/starfive,jhb100-i2c.yaml
new file mode 100644
index 000000000000..c8631348121c
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/starfive,jhb100-i2c.yaml
@@ -0,0 +1,128 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) 2024 StarFive Technology Co., Ltd.
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/i2c/starfive,jhb100-i2c.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive jhb100 I2C Controller
+
+maintainers:
+  - Lianfeng Ouyang <lianfeng.ouyang@xxxxxxxxxxxxxxxx>
+
+allOf:
+  - $ref: /schemas/i2c/i2c-controller.yaml#
+
+properties:
+  compatible:
+    description: |
+      Must be one of:
+      - "starfive,jhb100-i2c-master" for master mode controller
+      - "starfive,jhb100-i2c-slave" for slave mode controller
+    enum:
+      - starfive,jhb100-i2c-master
+      - starfive,jhb100-i2c-slave
+
+  reg:
+    maxItems: 1
+    description: StarFive I2C controller memory mapped registers
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    minItems: 2
+    maxItems: 2
+    items:
+      - description: I2C controller reference clock source
+      - description: APB interface clock source
+
+  clock-names:
+    minItems: 2
+    maxItems: 2
+    items:
+      - const: ref
+      - const: pclk
+
+  resets:
+    maxItems: 1
+    description: Phandle to the reset controller for the I2C controller
+
+  clock-frequency:
+    description: Desired I2C bus clock frequency in Hz
+    enum: [100000, 400000, 1000000, 3400000]
+    default: 400000
+
+  i2c-sda-hold-time-ns:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: |
+      SDA hold time in nanoseconds, used to compute the value written into
+      the DW_IC_SDA_HOLD register.
+    default: 0
+
+  i2c-scl-falling-time-ns:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: |
+      SCL falling time in nanoseconds, used to compute the tLOW period.
+    default: 300
+
+  i2c-sda-falling-time-ns:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: |
+      SDA falling time in nanoseconds, used to compute the tHIGH period.
+    default: 300
+
+  starfive,mctp-i2c-ms:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description: |
+      Phandle to the master I2C node associated with this slave controller.
+      Only used in slave mode, typically for MCTP applications.
+
+  starfive,i2c-tx-fifo-depth:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: |
+      TX FIFO depth of the I2C controller.
+    default: 8
+
+  starfive,i2c-rx-fifo-depth:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: |
+      RX FIFO depth of the I2C controller.
+    default: 8
+
+unevaluatedProperties: false
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+  - interrupts
+
+examples:
+  - |
+    i2c@2000 {
+      compatible = "starfive,jhb100-i2c-master";
+      reg = <0x2000 0x100>;
+      #address-cells = <1>;
+      #size-cells = <0>;
+      clock-frequency = <400000>;
+      clocks = <&i2c_refclk>, <&apb_pclk>;
+      clock-names = "ref", "pclk";
+      interrupts = <0>;
+
+      eeprom@64 {
+        compatible = "atmel,24c02";
+        reg = <0x64>;
+      };
+    };
+    |
+    i2c@3000 {
+      compatible = "starfive,jhb100-i2c-slave";
+      reg = <0x3000 0x100>;
+      clocks = <&i2c_refclk>, <&apb_pclk>;
+      clock-names = "ref", "pclk";
+      interrupts = <1>;
+      starfive,mctp-i2c-ms = <&i2c_master>;
+    };
+...
-- 
2.43.0