Re: [PATCH 2/3] arm64: dts: renesas: r9a09g087: Add xSPI nodes
From: Geert Uytterhoeven
Date: Wed May 27 2026 - 06:08:56 EST
Hi Prabhakar,
On Tue, 5 May 2026 at 14:02, Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
>
> Add xSPI (Expanded SPI) device nodes to the RZ/N2H (R9A09G087) SoC DTSI.
> The RZ/N2H integrates two xSPI interfaces.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
Thanks for your patch!
> --- a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a09g087.dtsi
> @@ -1009,6 +1009,44 @@ mii_conv3: mii-conv@3 {
> };
> };
>
> + xspi0: spi@801c0000 {
> + compatible = "renesas,r9a09g087-xspi", "renesas,r9a09g047-xspi";
> + reg = <0 0x801c0000 0 0x1000>,
> + <0 0x40000000 0 0x10000000>;
> + reg-names = "regs", "dirmap";
> + interrupts = <GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "pulse", "err_pulse";
> + clocks = <&cpg CPG_MOD 4>,
> + <&cpg CPG_CORE R9A09G087_XSPI_CLK0>;
> + clock-names = "ahb", "spi";
> + resets = <&cpg 0x4>;
4
> + reset-names = "hresetn";
> + power-domains = <&cpg>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
i.e. will queue in renesas-devel for v7.2 with the above fixed.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds