[RFC PATCH] drm/xe/hwmon: report a single fan for DG2 instead of two
From: Zhan Wei
Date: Wed May 27 2026 - 07:56:02 EST
xe_hwmon_pcode_read_fan_control() currently hardcodes *uval = 2 when
queried with FSC_READ_NUM_FANS on DG2. This causes fan2_input to be
exposed via sysfs, but on the tested Arc A750 LE (DG2 G10, PCI ID
0x56a1) fan2_input reads 0 RPM permanently while fan1_input correctly
reports ~800 RPM with both physical fan physically spinning.
The RPM is calculated delta-based from a tach pulse counter:
rotations = (reg_val - fi->reg_val_prev) / 2;
so a constant-zero RPM means the register at offset 0x138170
(BMG_FAN_2_SPEED) simply does not accumulate pulses on DG2 silicon.
The i915 driver does not expose fan2 on DG2 at all -- it only maps
PCU_PWM_FAN_SPEED (0x138140, identical to BMG_FAN_1_SPEED), consistent
with the observation that only one fan tach register is wired on DG2.
Report a single fan for DG2 to keep the phantom fan2_input out of
sysfs. Battlemage paths are unchanged.
Tested on Arc A750 LE (DG2 G10): with this patch applied, fan2_input
no longer appears in /sys/class/hwmon/hwmonX/ and `sensors xe-pci-0300`
shows fan1 only.
Fixes: 28f79ac609de ("drm/xe/hwmon: expose fan speed")
Signed-off-by: Zhan Wei <zhanwei919@xxxxxxxxx>
---
Open questions for reviewers: this is verified only on DG2 G10. Owners
of G11 (e.g. ASRock Challenger A750) and G12 (e.g. Sparkle Titan A750
with three physical fans) -- does fan2_input or fan3_input ever read
non-zero in your setup? If so, the right fix is a per-subplatform
table rather than a flat 1.
drivers/gpu/drm/xe/xe_hwmon.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index de3f2aeffc3f..2a60a76b1971 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -860,9 +860,15 @@ static int xe_hwmon_pcode_read_fan_control(const struct xe_hwmon *hwmon, u32 sub
{
struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
- /* Platforms that don't return correct value */
+ /*
+ * The PCODE FAN_SPEED_CONTROL subcommands return an error on DG2, so we
+ * answer the FSC_READ_NUM_FANS query here. DG2 only wires a single fan
+ * tachometer register (BMG_FAN_1_SPEED == 0x138140, shared with i915's
+ * PCU_PWM_FAN_SPEED); BMG_FAN_2/3_SPEED read 0 on DG2 silicon. Reporting
+ * one fan keeps a phantom fan2_input that always reads 0 out of sysfs.
+ */
if (hwmon->xe->info.platform == XE_DG2 && subcmd == FSC_READ_NUM_FANS) {
- *uval = 2;
+ *uval = 1;
return 0;
}
--
2.43.0