Re: [PATCH 3/4] arm64: dts: renesas: r9a08g046l48-smarc: Add gpio keys
From: Geert Uytterhoeven
Date: Wed May 27 2026 - 11:31:55 EST
Hi Biju,
On Tue, 5 May 2026 at 09:02, Biju <biju.das.au@xxxxxxxxx> wrote:
> From: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
>
> RZ/G3L SMARC EVK has 3 user buttons called USER_SW1, USER_SW2 and
> USER_SW3. Instantiate the gpio-keys driver for these buttons by
> removing place holders and replacing proper pins for the buttons.
>
> The USER_SW{1,2,3} configured as wakeup-source, so it can wakeup the
> system during s2idle.
>
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
Thanks for the update!
> --- a/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts
> +++ b/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts
> @@ -7,10 +7,18 @@
>
> /dts-v1/;
>
> -/* Add place holder to avoid compilation error with renesas-smarc2.dtsi */
> -#define KEY_1_GPIO 1
> -#define KEY_2_GPIO 2
> -#define KEY_3_GPIO 3
> +/* Switch selection settings */
> +#define RZ_BOOT_MODE3 0
> +#define SW_DPI_EN 0
The macro SW_DPI_EN is active-high...
> +#define SW_GPIO4 0
... but the macro SW_GPIO is active-low?
> +
> +#define PMOD_GPIO4 0
> +#define PMOD_GPIO6 0
> +#define PMOD_GPIO7 0
> +
> +#define KEY_1_GPIO RZG3L_GPIO(J, 3)
> +#define KEY_2_GPIO RZG3L_GPIO(6, 4)
> +#define KEY_3_GPIO RZG3L_GPIO(6, 5)
>
> #include <dt-bindings/gpio/gpio.h>
> #include <dt-bindings/input/input.h>
> @@ -30,11 +38,17 @@ aliases {
> };
>
> &keys {
> - status = "disabled";
> -
> +#if RZ_BOOT_MODE3 || SW_GPIO4 || PMOD_GPIO4
> /delete-node/ key-1;
> +#endif
> +
> +#if SW_DPI_EN || PMOD_GPIO6
> /delete-node/ key-2;
> +#endif
> +
> +#if SW_DPI_EN || PMOD_GPIO7
> /delete-node/ key-3;
> +#endif
> };
>
> &pinctrl {
> diff --git a/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi
> index 6d86b88ce104..bc1178c7484a 100644
> --- a/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi
> +++ b/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi
> @@ -5,6 +5,23 @@
> * Copyright (C) 2026 Renesas Electronics Corp.
> */
>
> +/*
> + * Please set the below switch position on the SoM and the corresponding macro
> + * on the board DTS:
> + *
> + * Switch position SYS.5, Macro SW_DPI_EN:
> + * 0 - Select multiple SMARC signals active
> + * 1 - Select LCD
While the SW_DPI_EN macro is active-high, the signal SW_DPI_EN#
is active-low, so setting the switch ON pulls SW_DPI_EN# low, which
is OK...
> + *
> + * Switch position BOOT.1, Macro RZ_BOOT_MODE3:
> + * 0 - Select SDIO {CD,IOVS,PWEN} and GPIO4 Active
> + * 1 - Select JTAG enabled
Setting the switch on pulls RZ_BOOT_MODE3 low, hence disables JTAG!
So this is inverted compared to SW_DPI_EN above?
> + *
> + * Switch position SW_GPIO4, Macro SW_GPIO4:
> + * 0 - Select GPIO4
> + * 1 - Select RZ_VBAT_TAMPER
This is a single pole double throw switch, so please document the
which position corresponds to 0 and 1:
* 0 - Select GPIO4 (position 2-3)
* 1 - Select RZ_VBAT_TAMPER (position 2-1)
However, I think it would be more logical if SW_GPIO4 == 1 would mean
that GPIO4 is enabled.
> + */
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds