Re: [PATCH 3/6] drm/msm/dp: Limit voltage swing level to 2 for RA620 bridge

[Gekko]

Hi Konrad

I completely agree.

This patch is a temporary hardware workaround for RA620 bridge support 
and should not have been submitted. Please disregard.

Graham

On 22/05/2026 21:28, Konrad Dybcio wrote:
> On 5/22/26 8:06 AM, Graham O'Connor wrote:
> > The RA620 DP-to-HDMI bridge used on the Radxa Dragon Q6A does not
> > acknowledge DP link training at voltage swing level 3. The bridge
> > requests maximum voltage swing but never completes link training
> > when the driver attempts level 3, causing HDMI output to fail.
> >
> > Cap DP_TRAIN_LEVEL_MAX at 2 to match the behaviour of the vendor
> > kernel, where link training completes successfully at level 2.
> > This allows the RA620 bridge to establish a stable HDMI connection.
> >
> > Tested on Radxa Dragon Q6A (QCS6490) with RA620 DP-to-HDMI bridge
> >
> > Signed-off-by: Graham O'Connor <graham.oconnor@xxxxxxxxx>
> > ---
> >   drivers/gpu/drm/msm/dp/dp_link.h | 2 +-
> >   1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/msm/dp/dp_link.h b/drivers/gpu/drm/msm/dp/dp_link.h
> > index 76125e9c0..ff0d8e99d 100644
> > --- a/drivers/gpu/drm/msm/dp/dp_link.h
> > +++ b/drivers/gpu/drm/msm/dp/dp_link.h
> > @@ -24,7 +24,7 @@ struct msm_dp_link_info {
> >   	unsigned long capabilities;
> >   };
> >   
> > -#define DP_TRAIN_LEVEL_MAX	3
> > +#define DP_TRAIN_LEVEL_MAX	2
>
> You're limiting this value for *all* devices featuring a Qualcomm
> SoC with a DP controller. Instead, if this is really an issue that
> results from the bridge's capabilities (which could potentially only
> be a symptom, not the cause), this should be somehow limited to the
> specific bridge itself
>
> Konrad