Re: [PATCH] mtd: spi-nor: Add support for MX25L12833F and MX25L12845G

[Cheng Ming Lin]

Hi Michael,

Michael Walle <mwalle@xxxxxxxxxx> 於 2026年5月28日週四 下午2:36寫道：
>
> Hi,
>
> On Thu May 28, 2026 at 7:17 AM CEST, Cheng Ming Lin wrote:
> > From: Cheng Ming Lin <chengminglin@xxxxxxxxxxx>
> >
> > Add support for Macronix MX25L12833F and MX25L12845G.
> >
> > The SFDP tables for these flashes only declare 1-4-4 Page Program
> > support in 4-byte address mode. However, since these parts operate
> > in 3-byte address mode, the standard SFDP parsing does not automatically
> > enable this capability. To address this, this patch introduces
> > macronix_4pp3b_late_init_fixups() to explicitly enable the 1-4-4
> > Page Program.
> >
> > Signed-off-by: Cheng Ming Lin <chengminglin@xxxxxxxxxxx>
>
> ...
>
> > --- a/drivers/mtd/spi-nor/macronix.c
> > +++ b/drivers/mtd/spi-nor/macronix.c
> > @@ -83,6 +83,18 @@ mx25l3255e_late_init_fixups(struct spi_nor *nor)
> >       return 0;
> >  }
> >
> > +static int
> > +macronix_4pp3b_late_init_fixups(struct spi_nor *nor)
> > +{
> > +     struct spi_nor_flash_parameter *params = nor->params;
> > +
> > +     params->hwcaps.mask |= SNOR_HWCAPS_PP_1_4_4;
> > +     spi_nor_set_pp_settings(&params->page_programs[SNOR_CMD_PP_1_4_4],
> > +                             SPINOR_OP_PP_1_4_4, SNOR_PROTO_1_4_4);
> > +
> > +     return 0;
> > +}
> > +
> >  static const struct spi_nor_fixups mx25l25635_fixups = {
> >       .post_bfpt = mx25l25635_post_bfpt_fixups,
> >       .post_sfdp = macronix_qpp4b_post_sfdp_fixups,
> > @@ -96,6 +108,10 @@ static const struct spi_nor_fixups mx25l3255e_fixups = {
> >       .late_init = mx25l3255e_late_init_fixups,
> >  };
> >
> > +static const struct spi_nor_fixups macronix_4pp3b_fixups = {
> > +     .late_init = macronix_4pp3b_late_init_fixups,
> > +};
> > +
> >  static const struct flash_info macronix_nor_parts[] = {
> >       {
> >               .id = SNOR_ID(0xc2, 0x20, 0x10),
> > @@ -130,9 +146,10 @@ static const struct flash_info macronix_nor_parts[] = {
> >               .size = SZ_8M,
> >               .no_sfdp_flags = SECT_4K,
> >       }, {
> > -             /* MX25L12805D */
> > +             /* MX25L12805D, MX25L12833F, MX25L12845G */
> >               .id = SNOR_ID(0xc2, 0x20, 0x18),
> >               .flags = SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP,
> > +             .fixups = &macronix_4pp3b_fixups,
>
> It looks like you're getting bitten by the ID reuse. You can't just
> unconditionally add the quad PP because as far as I can see the
> MX25L12805D [1] is just a standard single bit i/o flash and doesn't
> support the 4PP.

You are absolutely right. Thanks for catching this.

The MX25L12805D is indeed a much older product (released around 2009).
Since the initial JESD216 SFDP standard wasn't published until 2011,
I double-checked with our internal PM and confirmed that the MX25L12805D
does not support SFDP at all.

Since the newer flashes (MX25L12833F and MX25L12845G) do support SFDP,
we could use this as a differentiator to distinguish them from the legacy
MX25L12805D.

What if we try to read the SFDP signature (RDSFDP) in the fixup hook?
If a valid SFDP signature is detected, we can safely identify it as the
newer flash and apply the SNOR_HWCAPS_PP_1_4_4 capability. If there is
no SFDP signature, we leave it as is for the legacy MX25L12805D.

Do you think this approach is feasible and acceptable? If so, I will
implement this logic and submit a v2 patch.

>
> -michael
>
> [1] https://www.macronix.com/Lists/Datasheet/Attachments/8582/MX25L12805D,%203V,%20128Mb,%20v1.2.pdf

Thanks,
Cheng Ming Lin