Re: [PATCH] PCI: qcom: Disable ASPM L0s for SA8775P

[Manivannan Sadhasivam]

On Tue, Apr 21, 2026 at 10:55:56AM +0800, Shawn Guo wrote:
> On Mon, Apr 20, 2026 at 12:08:25PM +0530, Manivannan Sadhasivam wrote:
> > On Sun, Apr 19, 2026 at 05:39:34PM +0800, Shawn Guo wrote:
> > > Commit f5cd8a929c82 ("PCI: dwc: Remove MSI/MSIX capability for Root Port
> > > if iMSI-RX is used as MSI controller") removed MSI/MSI-X capabilities
> > > from the Root Port on platforms using iMSI-RX (including SA8775P, which
> > > has no msi-parent/msi-map in DT).  This causes PME and AER service
> > > drivers to fall back from MSI to INTx.
> > > 
> > > With INTx-based PME active, the QCN9100 modem endpoint sends PME messages
> > > during D-state transitions early in boot.  The level-triggered INTx
> > > assertion coincides with ASPM L0s exit sequencing on SA8775P hardware,
> > > causing Data Link Layer Replay Timer Timeout errors on both sides of the
> > > link.
> > > 
> > 
> > How did you conclude that INTx collides with ASPM L0s exit sequence? Also,
> > AFAIK, L0s is supported and work well on this chipset.
> > 
> > What we are dealing with could be the board specific issue.
> 
> I just got looped into an internal discussion.  The issue seems to
> be refgen voting related, so likely affects all Lemans (and Monaco)
> boards with PCIe enabled.
> 
> Before a proper fix is available, 'pcie_aspm=off' on kernel cmdline is
> suggested as a temporary workaround.
> 

As I checked internally, it turned out that the SA8775p SoC has some hardware
issue that affects the transition from L0s to L0. So I went ahead and applied
the patch with a change in commit message and fixes tag, thanks!

- Mani

-- 
மணிவண்ணன் சதாசிவம்