Re: [REGRESSION] x86/hugetlb: AMD F15h VA alignment offset breaks MAP_HUGETLB alignment

[Oscar Salvador (SUSE)]

On Thu, May 28, 2026 at 08:31:18AM -0700, Borislav Petkov wrote:
> On Thu, May 28, 2026 at 04:03:12PM +0200, Oscar Salvador (SUSE) wrote:
> > On Thu, May 28, 2026 at 02:45:01PM +0200, Oscar Salvador (SUSE) wrote:
> > > The only thing bugging is, should not the same happen for THP-file-backed mappings?
> > 
> > Aha, no, for THP we do not set align_mask (at least on x86), and the masking off is being
> > done in __thp_get_unmapped_area().
> 
> I hope you found this in the proces:
> 
> dfb09f9b7ab0 ("x86, amd: Avoid cache aliasing penalties on AMD family 15h")

Ei Boris, thanks for pointing it out.

Actually, checking the other arches that have their own get_align_mask()
for setting the mask (s390 and sparc), they both skip info.align_offset
if we are dealing with hugetlb, e.g: s390:

 info.align_mask = get_align_mask(filp, flags);
 if (!(filp && is_file_hugepages(filp)))
         info.align_offset = pgoff << PAGE_SHIFT;

So, maybe for the time being we can do the same in x86 in order to fix the
regression (although the refactoring is 2 years old and first time we heard
about it was yesterday) and then we can think of a nicer way to handle this
in non-arch code so s390 and sparc would get cleaned up as well.
Thoughts?



-- 
Oscar Salvador
SUSE Labs