[PATCH v2 2/3] dt-bindings: thermal: qcom: add pm8901-temp-alarm

From: Herman van Hazendonk

Date: Sun May 31 2026 - 00:11:19 EST


Add the binding for the temperature-alarm block inside the Qualcomm
PM8901 PMIC (companion to the PM8058 on MSM8x60). The block has four
selectable thresholds and three escalating stages; the driver maps
these to representative millicelsius readings exposed to the
thermal-of framework, and a board DT can wire stage 3 as a critical
trip so the kernel issues orderly_poweroff() when the part overheats.

The binding describes the SSBI sub-node address (CTRL register
offset) and the two PMIC-internal interrupts the alarm raises:

- TEMP_ALARM (PM8901 IRQ block 6 bit 4 == hwirq 52),
asserted on every stage transition;
- TEMP_HI_ALARM (PM8901 IRQ block 6 bit 5 == hwirq 53),
asserted when the high-temperature stage is reached.

The interrupts are sourced from the parent qcom,pm8901 PMIC's own
interrupt-controller (not the SoC GIC); the node references the core
/schemas/thermal/thermal-sensor.yaml so that the standard
#thermal-sensor-cells handling and other shared thermal-sensor
constraints are inherited automatically.

Signed-off-by: Herman van Hazendonk <github.com@xxxxxxxxxx>
---
.../thermal/qcom,pm8901-temp-alarm.yaml | 90 +++++++++++++++++++
1 file changed, 90 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/qcom,pm8901-temp-alarm.yaml

diff --git a/Documentation/devicetree/bindings/thermal/qcom,pm8901-temp-alarm.yaml b/Documentation/devicetree/bindings/thermal/qcom,pm8901-temp-alarm.yaml
new file mode 100644
index 000000000000..5d9eaeab8326
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/qcom,pm8901-temp-alarm.yaml
@@ -0,0 +1,90 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/thermal/qcom,pm8901-temp-alarm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm PM8901 PMIC Temperature Alarm
+
+maintainers:
+ - Herman van Hazendonk <github.com@xxxxxxxxxx>
+
+description: |
+ PM8901 is a secondary PMIC paired with PM8058 on MSM8x60 family
+ (MSM8260/MSM8660/APQ8060) platforms. It exposes an over-temperature
+ alarm block at SSBI offset 0x23 (CTRL) with four selectable
+ thresholds and three escalating stages.
+
+ Unlike PM8058, there is no raw die-temperature ADC channel - the
+ driver decodes the stage + threshold pair into a representative
+ millicelsius value reported via the thermal-of framework.
+
+ Two PMIC-internal interrupts are exposed:
+
+ - TEMP_ALARM (PM8901 IRQ block 6 bit 4 == hwirq 52): asserted
+ on every stage transition;
+ - TEMP_HI_ALARM (PM8901 IRQ block 6 bit 5 == hwirq 53): asserted
+ when the part enters the high-temperature stage.
+
+ Both line up on the parent qcom,pm8901 interrupt-controller.
+
+allOf:
+ - $ref: /schemas/thermal/thermal-sensor.yaml#
+
+properties:
+ compatible:
+ const: qcom,pm8901-temp-alarm
+
+ reg:
+ description: SSBI offset of the temp-alarm CTRL register.
+ maxItems: 1
+
+ interrupts:
+ items:
+ - description: Stage-transition alarm interrupt (TEMP_ALARM).
+ - description: Hi-temperature alarm interrupt (TEMP_HI_ALARM).
+
+ interrupt-names:
+ items:
+ - const: alarm
+ - const: hi-alarm
+
+ "#thermal-sensor-cells":
+ const: 0
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ ssbi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pmic@0 {
+ compatible = "qcom,pm8901";
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ interrupt-parent = <&tlmm>;
+ interrupts = <31 IRQ_TYPE_EDGE_RISING>;
+
+ temp-alarm@23 {
+ compatible = "qcom,pm8901-temp-alarm";
+ reg = <0x23>;
+ interrupts = <52 IRQ_TYPE_EDGE_RISING>,
+ <53 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "alarm", "hi-alarm";
+ #thermal-sensor-cells = <0>;
+ };
+ };
+ };
--
2.43.0