Re: [RFC] drivers/staging/axis-fifo: TODO file and subsystem direction

[Andrew Lunn]

On Sun, May 31, 2026 at 08:20:35PM +0530, Grewstad wrote:
> Dear Maintainers,
> 
> I am interested in contributing to the Xilinx AXI-Stream FIFO driver
> located in drivers/staging/axis-fifo.
> 
> While reviewing the driver, I noticed that it does not currently
> contain a TODO file describing the work required for graduation from
> staging. I would like to create such a file, but before doing so I
> would appreciate guidance on the expected long-term direction for the
> driver.
> 
> The driver currently exposes a custom userspace ABI through a
> miscdevice. While this provides a generic interface to the FIFO, it
> does not integrate with existing kernel subsystem tooling. One possible
> incremental improvement in this area could be a transition from
> miscdevice to a proper character device (cdev) interface, to allow for
> a more clearly defined and maintainable userspace ABI.

In addition to what GregKH said, look at the vendor information:

https://docs.amd.com/r/en-US/pg080-axi-fifo-mm-s/Core-Overview

  The AXI4-Stream FIFO core was designed to provide memory-mapped
  access to an AXI4-Stream interface connected to other IP (such as
  the AXI Ethernet core). Systems must be built through the AMD
  Vivado™ Design Suite to attach the AXI4-Stream FIFO core, AXI
  Ethernet core ...

when used for Ethernet, a uAPI is not needed. The FIFO driver would
just expose an kernel internal API the Ethernet driver would use. Are
there any Ethernet devices using it? Is there a driver for the AXI
Ethernet core? Does drivers/net/ethernet/xilinx/* duplicate the same
code? xilinx_axienet_main.c says:

 * TODO:
 *  - Add Axi Fifo support.

which could be this.

As GregKH said, find some hardware using these IP cores, or synthesise
your own, and then work on the driver.

	Andrew