Re: [PATCH v9 4/4] coresight: cti: expose banked sysfs registers for Qualcomm extended CTI

From: Yingchao Deng (Consultant)

Date: Sun May 31 2026 - 22:09:15 EST



On 5/29/2026 11:32 PM, Leo Yan wrote:
On Thu, May 21, 2026 at 08:16:30PM +0800, Yingchao Deng wrote:

[...]

@@ -515,18 +543,36 @@ static struct attribute *coresight_cti_regs_attrs[] = {
&dev_attr_appclear.attr,
&dev_attr_apppulse.attr,
coresight_cti_reg(triginstatus, CTITRIGINSTATUS),
+ coresight_cti_reg_index(triginstatus1, CTITRIGINSTATUS, 1),
+ coresight_cti_reg_index(triginstatus2, CTITRIGINSTATUS, 2),
+ coresight_cti_reg_index(triginstatus3, CTITRIGINSTATUS, 3),
For this patch:

Reviewed-by: Leo Yan <leo.yan@xxxxxxx>

AI tool reminds to update
Documentation/ABI/testing/sysfs-bus-coresight-devices-cti, you might
need to add description with a new patch:

What: /sys/bus/coresight/devices/<cti-name>/regs/trigoutstatus[1-3]
Date: May 2026
KernelVersion: 7.2
Contact: coresight@xxxxxxxxxxxxxxxx
Description: (Read) read current status of QCOM extended output trigger signals.

And please add document for other new sysfs knobs.

Thanks,
Leo
  Thanks for the Reviewed-by.

  I noticed that among the new sysfs knobs in this series, the
  integration test registers (ittrigin[1-3], ittrigout[1-3],
  ittrigoutack[1-3], ittriginack[1-3]) have no existing documentation
  for their base (index-0) counterparts, which were added long before
  this series.

  Two options for patch 5/5:

    (a) Document only the knobs whose base versions are already
        documented (triginstatus[1-3] and trigoutstatus[1-3]).

    (b) Document everything in patch 5/5 — both the new indexed
        variants and the previously missing base IT register entries.

  I'm leaning toward (a) to keep the series focused, but happy to go
  with (b) if you prefer to get it all done at once. What do you think?


Thanks,
Yingchao