Re: [PATCH v2 03/10] arm64: dts: qcom: Add QUPv3 configuration for Shikra

[Komal Bajaj]

On 5/30/2026 11:57 PM, Komal Bajaj wrote:
> From: Xueyao An <xueyao.an@xxxxxxxxxxxxxxxx>
>
> Add device tree support for QUPv3 serial engine protocols on Shikra.
> Shikra has 10 QUP serial engines under a single QUP wrapper, all with
> support of GPI DMA engines.
>
> Signed-off-by: Xueyao An <xueyao.an@xxxxxxxxxxxxxxxx>
> Signed-off-by: Komal Bajaj <komal.bajaj@xxxxxxxxxxxxxxxx>
> ---
>   arch/arm64/boot/dts/qcom/shikra.dtsi | 951 +++++++++++++++++++++++++++++++++++
>   1 file changed, 951 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/shikra.dtsi b/arch/arm64/boot/dts/qcom/shikra.dtsi
> index a4334d99c1f3..2751b4f89678 100644
> --- a/arch/arm64/boot/dts/qcom/shikra.dtsi
> +++ b/arch/arm64/boot/dts/qcom/shikra.dtsi
> @@ -6,6 +6,7 @@
>   #include <dt-bindings/clock/qcom,rpmcc.h>
>   #include <dt-bindings/clock/qcom,shikra-gcc.h>
>   #include <dt-bindings/interconnect/qcom,icc.h>
> +#include <dt-bindings/dma/qcom-gpi.h>
>   #include <dt-bindings/interconnect/qcom,rpm-icc.h>
>   #include <dt-bindings/interconnect/qcom,shikra.h>
>   #include <dt-bindings/interrupt-controller/arm-gic.h>
> @@ -348,6 +349,161 @@ tlmm: pinctrl@500000 {
>   			gpio-ranges = <&tlmm 0 0 165>;
>   			wakeup-parent = <&mpm>;
>   
> +			qup_i2c0_data_clk: qup-i2c0-data-clk-state {
> +				/* SDA, SCL */
> +				pins = "gpio2", "gpio3";
> +				function = "qup0_se0";
> +				drive-strength = <2>;
> +				bias-pull-up;

[...]

>   
> +		gpi_dma0: dma-controller@4a00000 {
> +			compatible = "qcom,shikra-gpi-dma", "qcom,sm6350-gpi-dma";
> +			reg = <0x0 0x04a00000 0x0 0x60000>;
> +
> +			interrupts = <GIC_SPI 511 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 512 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 514 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 515 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 516 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 517 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 518 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 519 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 520 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 521 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 522 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 523 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 524 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 525 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 526 IRQ_TYPE_LEVEL_HIGH>;

Ignore this series.
Missed updating interrupt cells to 4. Will fix this in next revision.

Thanks
Komal

> +
> +			dma-channels = <16>;
> +			dma-channel-mask = <0xff>;
> +			#dma-cells = <3>;
> +

[...]