[GIT PULL] RISC-V Tenstorrent devicetree changes for v7.2

[Drew Fustini]

The following changes since commit 254f49634ee16a731174d2ae34bc50bd5f45e731:

  Linux 7.1-rc1 (2026-04-26 14:19:00 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/tenstorrent/linux.git tags/tenstorrent-dt-for-v7.2

for you to fetch changes up to 33583baeb1ba7d328e6a9775d889036900b74cdb:

  dt-bindings: iommu: riscv: Add bindings for Tenstorrent RISC-V IOMMU (2026-05-23 17:14:35 -0700)

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Tenstorrent device tree for v7.2

Add a riscv,pmu node to the Tenstorrent Blackhole SoC device tree. This
enables OpenSBI to expose the SBI PMU extension, allowing Linux perf to
use the 4 programmable counters (mhpmcounter3-6) across 3 event classes:
instruction commit, microarchitectural, and memory system events.

Extend the RISC-V IOMMU device tree bindings to document the Tenstorrent
IOMMU used in the Tenstorrent Atlantis SoC. A second register range is
added which contains M-mode only registers like PMAs and PMPs. The
binding will be used by OpenSBI and potentially other M-mode software.

----------------------------------------------------------------
Michael Neuling (1):
      riscv: dts: tenstorrent: Add PMU node to blackhole for Linux perf support

Nicholas Piggin (1):
      dt-bindings: iommu: riscv: Add bindings for Tenstorrent RISC-V IOMMU

 .../devicetree/bindings/iommu/riscv,iommu.yaml     | 59 +++++++++++++++++++---
 arch/riscv/boot/dts/tenstorrent/blackhole.dtsi     | 48 ++++++++++++++++++
 2 files changed, 99 insertions(+), 8 deletions(-)