Re: [PATCH RFC v6 09/18] riscv_cbqri: Add bandwidth controller probe and allocation device ops

[Drew Fustini]

On Mon, Jun 01, 2026 at 08:49:31PM +0000, sashiko-bot@xxxxxxxxxx wrote:
> Thank you for your contribution! Sashiko AI review found 4 potential issue(s) to consider:
> - [High] Sentinel verification in cbqri_read_rbwb() and cbqri_read_mweight() spuriously fails with -EIO if the hardware's initial boot state matches the inverted software cache default.
> - [High] Software enforcement of the sum(Rbwb) <= MRBWB hardware invariant is bypassed because the software cache ignores the initial hardware state.
> - [High] Modifying a single bandwidth control field on an unconfigured RCID silently overwrites the other field with an artificial software default.
> - [Medium] cbqri_read_rbwb() and cbqri_read_mweight() perform a read-modify-write on the staging register without waiting for the controller to be idle.

These are not real problems. The software caches will not be out of sync
with the hardware by the time the schemata is visible to userspace. No
changes are needed.

Drew