Re: [PATCH v12 06/22] gpu: nova-core: Blackwell: use correct sysmem flush registers

From: Alexandre Courbot

Date: Tue Jun 02 2026 - 04:41:22 EST


On Tue Jun 2, 2026 at 4:12 PM JST, Eliot Courtney wrote:
> On Tue Jun 2, 2026 at 12:20 PM JST, John Hubbard wrote:
>> Blackwell GPUs moved the sysmem flush page registers away from the
>> Ampere/Ada location. GB10x routes the flush through a pair of HSHUB0
>> register sets (primary and egress) that must both be programmed to
>> the same address. GB20x routes it through FBHUB0.
>>
>> Define these registers relative to their HSHUB0 and FBHUB0 bases, as
>> Open RM does, and implement the flush paths in the GB10x and GB20x
>> framebuffer HALs.
>>
>> Signed-off-by: John Hubbard <jhubbard@xxxxxxxxxx>
>> ---
>
> This patch looks correct so:
>
> Reviewed-by: Eliot Courtney <ecourtney@xxxxxxxxxx>
>
> But it only updates the sysmem flush stuff for Blackwell. It looks like
> Hopper also uses different registers, so I think we should update it
> too (separate patch seems ok to me).

Indeed, OpenRM agrees with you. Hopper support seems to be rather
trivial (just 2 different registers to use IIUC).