Re: [PATCH v3 02/13] spi: dt-bindings: cdns,qspi-nor: add PHY tuning pattern partition property

[Krzysztof Kozlowski]

On 02/06/2026 14:36, Miquel Raynal wrote:
> Hello,
> 
>>>>>> I also have doubts that this is per-device property. Your commit msg
>>>>>> suggests it is per controller.
>>>>>
>>>>> This is a per-device property. It is consumed by the controller driver
>>>>> only to locate and retrieve the offset of the PHY pattern partition
>>>>
>>>> So with two devices on a bus, you need two separate partitions for tuning?
>>
>> Each SPI NOR flash device needs a partition to store PHY tuning
>> pattern.
> 
> If I may try to explain a bit what is behind, the read tuning procedure
> is about reading data from the spi memory cache (some kind of internal
> SRAM) over and over again, while tuning the controller parameters until
> we get the best stability (the controller driver knows the pattern it
> must get). While SPI NAND chips have "write to cache" opcodes that could
> be used to load the pattern into the chip without any actual read from
> the memory array, this is not possible with SPI NOR devices which do not
> have such capability. Since we want to keep this training procedure
> memory agnostic (and also somewhat simple), we shall expect one pattern
> per memory.

Can pieces of above be captured in commit msg, so it will be clearer to
folks without domain knowledge?

Best regards,
Krzysztof