Re: [PATCH 1/3] mtd: rawnand: pl353: Update timings at the right moment

[Olivier Sobrie]

Hello Miquel,

On Fri, May 29, 2026 at 06:29:56PM +0200, Miquel Raynal (DAVE) wrote:
> If several CE are wired, we would write the registers for every chip one
> after the other, and reselect the correct timings for the first chip the
> use wants to use after probe. This is not exactly efficient and could
> slightly be improved since we already have a helper that applies the
> configuration if there is a chip change. Instead of programming the
> registers in ->setup_interface(), let's just drop the pointer to the
> chip and let the nand_select_target() helper do its magic.
> 
> Cc: Olivier Sobrie <olivier@xxxxxxxxx>
> Signed-off-by: Miquel Raynal (DAVE) <miquel.raynal@xxxxxxxxxxx>
> ---
> Olivier,
> 
> This is an enhancement to your previous patch which already
> works. Can you please tell me if that change is okay for you?

Yes it looks good.
I tested the patch on one of my boards, it works as expected.

Acked-by: Olivier Sobrie <olivier@xxxxxxxxx>
Tested-by: Olivier Sobrie <olivier@xxxxxxxxx>

Thanks,

Olivier

> 
> Thanks,
> Miquèl
> ---
>  drivers/mtd/nand/raw/pl35x-nand-controller.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mtd/nand/raw/pl35x-nand-controller.c b/drivers/mtd/nand/raw/pl35x-nand-controller.c
> index f2c65eb7a8d9..986019b42153 100644
> --- a/drivers/mtd/nand/raw/pl35x-nand-controller.c
> +++ b/drivers/mtd/nand/raw/pl35x-nand-controller.c
> @@ -862,8 +862,11 @@ static int pl35x_nfc_setup_interface(struct nand_chip *chip, int cs,
>  			  PL35X_SMC_NAND_TAR_CYCLES(tmgs.t_ar) |
>  			  PL35X_SMC_NAND_TRR_CYCLES(tmgs.t_rr);
>  
> -	writel(plnand->timings, nfc->conf_regs + PL35X_SMC_CYCLES);
> -	pl35x_smc_update_regs(nfc);
> +	/*
> +	 * Reset nfc->selected_chip so the next command will cause the timing
> +	 * registers to be updated in ->*_select_target().
> +	 */
> +	nfc->selected_chip = NULL;
>  
>  	return 0;
>  }
> 
> -- 
> 2.53.0
>