RE: [PATCH v17 10/17] mmc: renesas_sdhi: Add optional axis/axim reset controls

[Biju Das]

Hi Philipp Zabel,

Thanks for the feedback.

> -----Original Message-----
> From: Philipp Zabel <p.zabel@xxxxxxxxxxxxxx>
> Sent: 03 June 2026 08:47
> Subject: Re: [PATCH v17 10/17] mmc: renesas_sdhi: Add optional axis/axim reset controls
> 
> On Mi, 2026-06-03 at 07:57 +0100, Biju wrote:
> > From: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> >
> > The RZ/G3L SoC has axis/axim resets compared to other SoCs.
> >
> > Add two optional reset controls, rstc_axis and rstc_axim, to the
> > renesas_sdhi struct. Both are acquired at probe time using
> > devm_reset_control_get_optional_exclusive_deasserted() with the "axis"
> > and "axim" reset names respectively.
> >
> > Include them alongside the existing rstc in bulk reset/assert/deassert
> > operations: triggered together in renesas_sdhi_reset(), and managed
> > via reset_control_bulk_assert/deassert() in the suspend and resume
> > paths, replacing the previous single-control calls.
> >
> > Being optional, these resets are a no-op on platforms that do not
> > provide them, so existing behaviour is preserved.
> >
> > Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> > ---
> > v1->v2:
> >  * No change.
> > ---
> >  drivers/mmc/host/renesas_sdhi.h      |  2 ++
> >  drivers/mmc/host/renesas_sdhi_core.c | 26 +++++++++++++++++++++++---
> >  2 files changed, 25 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/mmc/host/renesas_sdhi.h
> > b/drivers/mmc/host/renesas_sdhi.h index 0ca8ec27c320..6c024e7f69e1
> > 100644
> > --- a/drivers/mmc/host/renesas_sdhi.h
> > +++ b/drivers/mmc/host/renesas_sdhi.h
> > @@ -111,6 +111,8 @@ struct renesas_sdhi {
> >  	unsigned int tap_set;
> >
> >  	struct reset_control *rstc;
> > +	struct reset_control *rstc_axis;
> > +	struct reset_control *rstc_axim;
> >  	struct tmio_mmc_host *host;
> >  	struct regulator_dev *rdev;
> >
> > diff --git a/drivers/mmc/host/renesas_sdhi_core.c
> > b/drivers/mmc/host/renesas_sdhi_core.c
> > index 8e2fb19b994b..699872766f88 100644
> > --- a/drivers/mmc/host/renesas_sdhi_core.c
> > +++ b/drivers/mmc/host/renesas_sdhi_core.c
> > @@ -615,6 +615,8 @@ static void renesas_sdhi_reset(struct tmio_mmc_host *host, bool preserve)
> >  				sd_status = sd_ctrl_read32(host, CTL_SD_STATUS);
> >
> >  			reset_control_reset(priv->rstc);
> > +			reset_control_reset(priv->rstc_axis);
> > +			reset_control_reset(priv->rstc_axim);
> 
> Is this order (rstc, axis, axim) ...

There is no order mentioned in the hardware manual.

These are the bit definitions.

Bit 0: rstc, Bit 3: rst_axim, Bit 4: rst_axis

and

Binding lists the resets in the order { rst, axim, axis}


For, consistency I will keep the order { rstc, axim, axis }.

> 
> >  			/* Unknown why but without polling reset status, it will hang */
> >  			read_poll_timeout(reset_control_status, ret, ret == 0, 1, 100,
> >  					  false, priv->rstc);
> [...]
> > @@ -1351,13 +1361,18 @@ int renesas_sdhi_suspend(struct device *dev)
> > {
> >  	struct tmio_mmc_host *host = dev_get_drvdata(dev);
> >  	struct renesas_sdhi *priv = host_to_priv(host);
> > +	struct reset_control_bulk_data resets[] = {
> > +		{ .rstc = priv->rstc },
> > +		{ .rstc = priv->rstc_axim },
> > +		{ .rstc = priv->rstc_axis },
> 
> ... different from this one (rstc, axim, axis) on purpose?
> 

This is OK. Will fix the above reset order for consistency.

Cheers,
Biju