[PATCH 3/3] arm64: dts: realtek: Add I/O level detector
From: Yu-Chun Lin
Date: Thu Jun 04 2026 - 07:27:28 EST
Add io-level-detector node with pinctrl configurations for 1.8V/3.3V
voltage selection on RGMII, SDIO, CSI, SD, UART1, AIO, and eMMC.
Signed-off-by: Yu-Chun Lin <eleanor.lin@xxxxxxxxxxx>
---
This patch depends on this pinctrl node patch [1].
[1] https://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git/commit/?id=50d92732d10e
---
arch/arm64/boot/dts/realtek/kent-pinctrl.dtsi | 108 ++++++++++++++++++
arch/arm64/boot/dts/realtek/kent.dtsi | 28 +++++
2 files changed, 136 insertions(+)
create mode 100644 arch/arm64/boot/dts/realtek/kent-pinctrl.dtsi
diff --git a/arch/arm64/boot/dts/realtek/kent-pinctrl.dtsi b/arch/arm64/boot/dts/realtek/kent-pinctrl.dtsi
new file mode 100644
index 000000000000..ec7e33034b96
--- /dev/null
+++ b/arch/arm64/boot/dts/realtek/kent-pinctrl.dtsi
@@ -0,0 +1,108 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
+/*
+ * Copyright (c) 2022-2026 Realtek Semiconductor Corp.
+ */
+
+&iso_pinctrl {
+ aio_vsel_1v8_pins: aio-vsel-1v8-pins {
+ pins = "gpio_98", "gpio_99", "gpio_100", "gpio_101", "gpio_102", "gpio_103",
+ "gpio_104", "gpio_105", "gpio_106", "gpio_107", "gpio_108", "gpio_109",
+ "gpio_110", "gpio_111", "gpio_112";
+ power-source = <0>;
+ input-threshold-voltage-microvolt = <1800000>;
+ };
+
+ aio_vsel_3v3_pins: aio-vsel-3v3-pins {
+ pins = "gpio_98", "gpio_99", "gpio_100", "gpio_101", "gpio_102", "gpio_103",
+ "gpio_104", "gpio_105", "gpio_106", "gpio_107", "gpio_108", "gpio_109",
+ "gpio_110", "gpio_111", "gpio_112";
+ power-source = <1>;
+ input-threshold-voltage-microvolt = <3300000>;
+ };
+
+ csi_vsel_1v8_pins: csi-vsel-1v8-pins {
+ pins = "csi_vdsel";
+ function = "csi_1v8";
+ };
+
+ csi_vsel_3v3_pins: csi-vsel-3v3-pins {
+ pins = "csi_vdsel";
+ function = "csi_3v3";
+ };
+
+ rgmii_vsel_1v8_pins: rgmii-vsel-1v8-pins {
+ pins = "rgmii_vdsel";
+ function = "rgmii_1v8";
+ };
+
+ rgmii_vsel_3v3_pins: rgmii-vsel-3v3-pins {
+ pins = "rgmii_vdsel";
+ function = "rgmii_3v3";
+ };
+
+ sdio_vsel_1v8_pins: sdio-vsel-1v8-pins {
+ pins = "gpio_45", "gpio_46", "gpio_47", "gpio_48", "gpio_49", "gpio_50";
+ power-source = <0>;
+ };
+
+ sdio_vsel_3v3_pins: sdio-vsel-3v3-pins {
+ pins = "gpio_45", "gpio_46", "gpio_47", "gpio_48", "gpio_49", "gpio_50";
+ power-source = <1>;
+ };
+
+ uart1_vsel_1v8_pins: uart1-vsel-1v8-pins {
+ pins = "gpio_8", "gpio_9", "gpio_10", "gpio_11";
+ power-source = <0>;
+ input-threshold-voltage-microvolt = <1800000>;
+ };
+
+ uart1_vsel_3v3_pins: uart1-vsel-3v3-pins {
+ pins = "gpio_8", "gpio_9", "gpio_10", "gpio_11";
+ power-source = <1>;
+ input-threshold-voltage-microvolt = <3300000>;
+ };
+};
+
+&main2_pinctrl {
+ emmc_vsel_1v8_pins: emmc-vsel-1v8-pins {
+ pins = "emmc_rst_n",
+ "emmc_dd_sb",
+ "emmc_clk",
+ "emmc_cmd",
+ "emmc_data_0",
+ "emmc_data_1",
+ "emmc_data_2",
+ "emmc_data_3",
+ "emmc_data_4",
+ "emmc_data_5",
+ "emmc_data_6",
+ "emmc_data_7";
+ power-source = <0>;
+ };
+
+ emmc_vsel_3v3_pins: emmc-vsel-3v3-pins {
+ pins = "emmc_rst_n",
+ "emmc_dd_sb",
+ "emmc_clk",
+ "emmc_cmd",
+ "emmc_data_0",
+ "emmc_data_1",
+ "emmc_data_2",
+ "emmc_data_3",
+ "emmc_data_4",
+ "emmc_data_5",
+ "emmc_data_6",
+ "emmc_data_7";
+ power-source = <1>;
+ };
+
+ sd_vsel_1v8_pins: sd-vsel-1v8-pins {
+ pins = "gpio_40", "gpio_41", "hif_clk", "hif_data", "hif_en", "hif_rdy";
+ power-source = <0>;
+ };
+
+ sd_vsel_3v3_pins: sd-vsel-3v3-pins {
+ pins = "gpio_40", "gpio_41", "hif_clk", "hif_data", "hif_en", "hif_rdy";
+ power-source = <1>;
+ };
+};
diff --git a/arch/arm64/boot/dts/realtek/kent.dtsi b/arch/arm64/boot/dts/realtek/kent.dtsi
index 8d4293cd4c03..f18b975c3593 100644
--- a/arch/arm64/boot/dts/realtek/kent.dtsi
+++ b/arch/arm64/boot/dts/realtek/kent.dtsi
@@ -125,6 +125,32 @@ psci: psci {
method = "smc";
};
+ io_level_detector: io-level-detector {
+ compatible = "realtek,rtd1625-io-detect";
+ pinctrl-names = "rgmii_1v8", "rgmii_3v3",
+ "sdio_1v8", "sdio_3v3",
+ "csi_1v8", "csi_3v3",
+ "sd_1v8", "sd_3v3",
+ "uart1_1v8", "uart1_3v3",
+ "aio_1v8", "aio_3v3",
+ "emmc_1v8", "emmc_3v3";
+ pinctrl-0 = <&rgmii_vsel_1v8_pins>;
+ pinctrl-1 = <&rgmii_vsel_3v3_pins>;
+ pinctrl-2 = <&sdio_vsel_1v8_pins>;
+ pinctrl-3 = <&sdio_vsel_3v3_pins>;
+ pinctrl-4 = <&csi_vsel_1v8_pins>;
+ pinctrl-5 = <&csi_vsel_3v3_pins>;
+ pinctrl-6 = <&sd_vsel_1v8_pins>;
+ pinctrl-7 = <&sd_vsel_3v3_pins>;
+ pinctrl-8 = <&uart1_vsel_1v8_pins>;
+ pinctrl-9 = <&uart1_vsel_3v3_pins>;
+ pinctrl-10 = <&aio_vsel_1v8_pins>;
+ pinctrl-11 = <&aio_vsel_3v3_pins>;
+ pinctrl-12 = <&emmc_vsel_1v8_pins>;
+ pinctrl-13 = <&emmc_vsel_3v3_pins>;
+ realtek,iso-pinctrl = <&iso_pinctrl>;
+ };
+
soc@0 {
compatible = "simple-bus";
ranges = <0x0 0x0 0x0 0x40000>, /* boot code */
@@ -184,3 +210,5 @@ gic: interrupt-controller@ff100000 {
};
};
};
+
+#include "kent-pinctrl.dtsi"
--
2.43.0