Re: [PATCH v7 08/12] media: iris: Handle CPU_CS_SCIACMDARG3 register write via program bootup registers hook
From: Dmitry Baryshkov
Date: Sun Jun 07 2026 - 17:48:44 EST
On Wed, Jun 03, 2026 at 07:48:46PM +0530, Vishnu Reddy wrote:
> On the Glymur platform, the firmware reads CPU_CS_SCIACMDARG3 during boot
> to determine the VM count and increments it by 1. Writing the default 0x1
> causes the firmware to treat the VM count as 2. To avoid that write 0x0 to
> CPU_CS_SCIACMDARG3 as a Glymur platform specific.
>
> Signed-off-by: Vishnu Reddy <busanna.reddy@xxxxxxxxxxxxxxxx>
> ---
> drivers/media/platform/qcom/iris/iris_vpu3x.c | 6 ++++++
> drivers/media/platform/qcom/iris/iris_vpu_common.c | 4 ++--
> drivers/media/platform/qcom/iris/iris_vpu_register_defines.h | 1 +
> 3 files changed, 9 insertions(+), 2 deletions(-)
>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxxxxxxxx>
--
With best wishes
Dmitry