Re: [PATCH] irqchip/gic-v3-its: Add Altera Agilex5 DMA workaround

[Marc Zyngier]

On Mon, 22 Jun 2026 03:49:45 +0100,
muhammad.nazim.amirul.nazle.asmade@xxxxxxxxxx wrote:
> 
> From: Adrian Ng Ho Yin <adrianhoyin.ng@xxxxxxxxxx>
> 
> Altera Agilex5 GIC600 integration has DDR addressing limitation where
> only the first 40 bits of physical address can be accessible. Extend
> existing dma32 quirk in driver to support Agilex5.
> 
> Signed-off-by: Adrian Ng Ho Yin <adrianhoyin.ng@xxxxxxxxxx>
> Signed-off-by: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade@xxxxxxxxxx>

I like the fact that you waited another *year*[1] to post a fixed
version of this change, and couldn't even be bothered to tag this as a
new version, not to mention the lack of Suggested-by: tag for code
that was provided for your perusal.

So you're late to the party, and someone else is doing actual work [2].

Please synchronise with them.

	M.

[1] https://lore.kernel.org/linux-arm-kernel/6a44509ca0edaabc17e59d2e27fef1c782183456.1751618484.git.adrianhoyin.ng@xxxxxxxxxx/
[2] https://lore.kernel.org/r/20260618220427.14325-3-marek.vasut+renesas@xxxxxxxxxxx

-- 
Without deviation from the norm, progress is not possible.