RE: [PATCH v5 1/4] dt-bindings: soc: cix: add sky1 audss cru controller
From: Joakim Zhang
Date: Tue Jun 23 2026 - 03:07:33 EST
Hi,
> -----Original Message-----
> From: Krzysztof Kozlowski <krzk@xxxxxxxxxx>
> Sent: Monday, June 22, 2026 5:02 PM
> To: Joakim Zhang <joakim.zhang@xxxxxxxxxxx>
> Cc: mturquette@xxxxxxxxxxxx; sboyd@xxxxxxxxxx; bmasney@xxxxxxxxxx;
> robh@xxxxxxxxxx; krzk+dt@xxxxxxxxxx; conor+dt@xxxxxxxxxx;
> p.zabel@xxxxxxxxxxxxxx; Gary Yang <gary.yang@xxxxxxxxxxx>; cix-kernel-
> upstream <cix-kernel-upstream@xxxxxxxxxxx>; linux-clk@xxxxxxxxxxxxxxx;
> devicetree@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; linux-arm-
> kernel@xxxxxxxxxxxxxxxxxxx
> Subject: Re: [PATCH v5 1/4] dt-bindings: soc: cix: add sky1 audss cru controller
>
> EXTERNAL EMAIL
>
> On Mon, Jun 22, 2026 at 10:25:17AM +0800, joakim.zhang@xxxxxxxxxxx wrote:
> > From: Joakim Zhang <joakim.zhang@xxxxxxxxxxx>
> >
> > The Cix Sky1 Audio Subsystem (AUDSS) Clock and Reset Unit (CRU) groups
> > clock muxing, gating and block-level software reset control in a
> > single register block.
> >
> > Signed-off-by: Joakim Zhang <joakim.zhang@xxxxxxxxxxx>
> > ---
> > .../bindings/soc/cix/cix,sky1-audss-cru.yaml | 92
> > +++++++++++++++++++ .../dt-bindings/clock/cix,sky1-audss-clock.h |
> > 60 ++++++++++++ .../dt-bindings/reset/cix,sky1-audss-reset.h | 25
> > +++++
> > 3 files changed, 177 insertions(+)
> > create mode 100644
> > Documentation/devicetree/bindings/soc/cix/cix,sky1-audss-cru.yaml
> > create mode 100644 include/dt-bindings/clock/cix,sky1-audss-clock.h
> > create mode 100644 include/dt-bindings/reset/cix,sky1-audss-reset.h
>
> Both headers should have the same name as the compatible. I already
> requested this some time ago, I think.
Sorry, will update.
Joakim