Re: [PATCH 2/13] dt-bindings: sound: Add Qualcomm QAIF binding
From: Konrad Dybcio
Date: Tue Jun 23 2026 - 11:54:08 EST
On 6/23/26 2:26 PM, Harendra Gautam wrote:
> On Tue, Jun 9, 2026 at 3:27 PM Konrad Dybcio
> <konrad.dybcio@xxxxxxxxxxxxxxxx> wrote:
>>
>> On 6/5/26 12:37 PM, Harendra Gautam wrote:
>>> Add a Devicetree binding for the Qualcomm Audio Interface (QAIF) CPU DAI
>>> controller used on the Shikra audio platform.
>>>
>>> QAIF moves PCM data between system memory and external serial audio
>>> interfaces through the AIF path, and between memory and the internal Bolero
>>> digital codec through the CIF path. The controller needs a binding so
>>> platform Devicetree files can describe its MMIO region, DMA IOMMU stream,
>>> clocks, interrupt, DAI cells and per-interface AIF configuration.
>>>
>>> Describe the single register region, one EE interrupt, the required GCC
>>> LPASS and audio core clocks, the DMA IOMMU mapping, and 'aif-interface@N'
>>> child nodes used for static PCM, TDM or MI2S configuration.
>>>
>>> Signed-off-by: Harendra Gautam <harendra.gautam@xxxxxxxxxxxxxxxx>
>>> ---
>>
>> [...]
>>
>>> + clock-names:
>>> + items:
>>> + - const: lpass_config_clk
>>> + - const: lpass_core_axim_clk
>>> + - const: aud_dma_clk
>>> + - const: aud_dma_mem_clk
>>> + - const: bus_clk
>>> + - const: aif_if0_ebit_clk
>>> + - const: aif_if0_ibit_clk
>>> + - const: aif_if1_ebit_clk
>>> + - const: aif_if1_ibit_clk
>>> + - const: aif_if2_ebit_clk
>>> + - const: aif_if2_ibit_clk
>>> + - const: aif_if3_ebit_clk
>>> + - const: aif_if3_ibit_clk
>>> + - const: ext_mclka_clk
>>> + - const: ext_mclkb_clk
>>
>> Drop the _clk suffix, we already know they are clocks, as they are
>> listed under the clocks property
> Okay, will correct.
>>
>> [...]
>>
>>> + qcom,qaif-aif-sync-mode:
>>> + $ref: /schemas/types.yaml#/definitions/uint32
>>> + description:
>>> + Sync mode. Use QAIF_AIF_SYNC_MODE_SHORT (0) for short (pulse)
>>> + sync or QAIF_AIF_SYNC_MODE_LONG (1) for long (level) sync.
>>> + qcom,qaif-aif-sync-src:
>>> + $ref: /schemas/types.yaml#/definitions/uint32
>>> + description:
>>> + Sync source. Use QAIF_AIF_SYNC_SRC_SLAVE (0) for slave mode
>>> + or QAIF_AIF_SYNC_SRC_MASTER (1) for master mode.
>>
>> Should these be boolean flags then?
> It should not be, the intention is to define explicitly, for better
> readability I can rename these flags as EXTERNAL/INTERNAL, Please
> suggest.
Are all 4 combinations of them being present/absent valid on shikra?
Konrad