Re: [PATCH] arm64: dts: qcom: glymur: fix PCIe SMMU interrupts

[Bjorn Andersson]

On Thu, 11 Jun 2026 19:00:44 +0000, Bjorn Andersson wrote:
> The PCIe SMMUv3 wired interrupts are routed to GIC extended SPI INTIDs
> 4100, 4098 and 4096. Describe them as ESPIs with the ESPI-relative
> interrupt numbers instead of regular SPIs 964, 962 and 960.
> 
> 

Applied, thanks!

[1/1] arm64: dts: qcom: glymur: fix PCIe SMMU interrupts
      commit: 52c7084c8fe57c259e50ff0a7d4f99ccecfc4c7a

Best regards,
-- 
Bjorn Andersson <andersson@xxxxxxxxxx>