[PATCH] ASoC: qcom: sc8280xp: support Senary MI2S

[Jorijn van der Graaf]

Extend the clock-provider DAI fmt setup to Senary MI2S; without it
q6i2s_set_fmt() is never called, ws_src remains external and the DSP
does not drive the I2S clocks.

Force 32-bit slots on this interface in the BE fixup. The only Senary
MI2S user so far is the Fairphone (Gen. 6), whose AW88261 speaker
amplifiers derive their boost converter clock from BCLK and are
configured by their firmware profile for 48 kHz x 32 bit x 2
(3.072 MHz BCLK), matching the downstream configuration of this
backend (bit_width 32). The board DTS enabling this interface is
headed upstream separately via linux-arm-msm. Should a board with
different requirements on this interface appear, the fixup can be
keyed on the card compatible instead.

Note the snd_mask_none() before snd_mask_set_format(): the latter only
ORs the format bit into the mask, and with the default S16 left in
place DPCM refinement still resolves to S16.

Assisted-by: Claude:claude-fable-5
Signed-off-by: Jorijn van der Graaf <jorijnvdgraaf@xxxxxxxxxxxxx>
---
 sound/soc/qcom/sc8280xp.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/sound/soc/qcom/sc8280xp.c b/sound/soc/qcom/sc8280xp.c
index 7925aa3f63ba..5a0b7f05c12b 100644
--- a/sound/soc/qcom/sc8280xp.c
+++ b/sound/soc/qcom/sc8280xp.c
@@ -34,6 +34,7 @@ static int sc8280xp_snd_init(struct snd_soc_pcm_runtime *rtd)
 	switch (cpu_dai->id) {
 	case PRIMARY_MI2S_RX...QUATERNARY_MI2S_TX:
 	case QUINARY_MI2S_RX...QUINARY_MI2S_TX:
+	case SENARY_MI2S_RX...SENARY_MI2S_TX:
 		snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_BP_FP);
 		break;
 	case WSA_CODEC_DMA_RX_0:
@@ -88,6 +89,17 @@ static int sc8280xp_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
 	case TX_CODEC_DMA_TX_3:
 		channels->min = 1;
 		break;
+	case SENARY_MI2S_RX...SENARY_MI2S_TX:
+		/*
+		 * Run the interface in 32-bit slots (3.072 MHz BCLK at
+		 * 48 kHz stereo), as the speaker amplifiers on this
+		 * interface require. The default S16 must be cleared
+		 * first: snd_mask_set_format() only ORs the bit in, and
+		 * DPCM refinement would still resolve to S16.
+		 */
+		snd_mask_none(fmt);
+		snd_mask_set_format(fmt, SNDRV_PCM_FORMAT_S32_LE);
+		break;
 	default:
 		break;
 	}

base-commit: be44d21728b6646189779923b841ad3a46d694e5
-- 
2.55.0