[PATCH 00/10] EDAC/{ie31200,igen6}: Fix address decoding and detect IMCs at runtime

[Qiuxu Zhuo]

Intel client EDAC drivers duplicate address translation logic and rely
on platform-specific IMC counts even though the IMCs can be detected
at runtime. This series fixes several decoding bugs, replaces static IMC
counts with runtime detection, and consolidates the common translation
logic to simplify future maintenance.

Patches 1-5: Fix several correctness issues in the ie31200 and igen6
drivers, including interleave boundary handling, channel hash selection,
non-hash address decoding, and logged error address translation.

Patches 6-7: Do small cleanups.

Patches 8-9: Detect the number of IMCs at runtime, allowing new SoCs
to be supported without maintaining per-platform IMC counts while
eliminating redundant resource configuration tables.

Patch 10: Refactor the address translation logic by introducing
shared helpers for the common interleave and hash translation operations.
This removes duplicated implementations across multiple decoding paths,
making future changes easier while preserving existing behavior.

Qiuxu Zhuo (10):
  EDAC/ie31200: Decouple DIMM width decoding from enum order
  EDAC/igen6: Fix interleave boundary condition
  EDAC/igen6: Fix channel selection hash
  EDAC/igen6: Fix channel address decode for non-hash mode
  EDAC/igen6: Fix Raptor Lake-P logged error address
  EDAC/igen6: Remove unnecessary XOR on the zero-valued interleave bit
  EDAC/igen6: Simplify compute die ID comments
  EDAC/igen6: Detect present memory controllers at runtime
  EDAC/igen6: Remove redundant resource configuration tables
  EDAC/igen6: Refactor address translation logic

 drivers/edac/ie31200_edac.c |  18 +-
 drivers/edac/igen6_edac.c   | 466 ++++++++++++++++++++----------------
 2 files changed, 278 insertions(+), 206 deletions(-)


base-commit: dc59e4fea9d83f03bad6bddf3fa2e52491777482
-- 
2.43.0