Re: [PATCH 1/4] arm64: dts: qcom: Use hyphen in node names

[Luca Weiss]

On Mon Jul 6, 2026 at 9:03 AM CEST, Krzysztof Kozlowski wrote:
> DTS coding style prefers hyphens instead of underscores in the node
> names.  Change should be safe, because node names are not considered an
> ABI.

Until Qualcomm decides they are ABI :(

>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxxxxxxxx>
> ---
>  arch/arm/boot/dts/qcom/qcom-apq8064-pins.dtsi             | 2 +-
>  arch/arm/boot/dts/qcom/qcom-msm8974.dtsi                  | 2 +-
>  arch/arm/boot/dts/qcom/qcom-sdx65-mtp.dts                 | 2 +-
>  arch/arm64/boot/dts/qcom/lemans-evk-camera.dtso           | 2 +-
>  arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi          | 4 ++--
>  arch/arm64/boot/dts/qcom/lemans.dtsi                      | 2 +-
>  arch/arm64/boot/dts/qcom/milos-nothing-asteroids.dts      | 2 +-
>  arch/arm64/boot/dts/qcom/monaco.dtsi                      | 2 +-
>  arch/arm64/boot/dts/qcom/sm6125-xiaomi-ginkgo-common.dtsi | 8 ++++----
>  9 files changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064-pins.dtsi b/arch/arm/boot/dts/qcom/qcom-apq8064-pins.dtsi
> index e53de709e9d1..e95da761234b 100644
> --- a/arch/arm/boot/dts/qcom/qcom-apq8064-pins.dtsi
> +++ b/arch/arm/boot/dts/qcom/qcom-apq8064-pins.dtsi
> @@ -87,7 +87,7 @@ gsbi7_uart_2pins: gsbi7-uart-2pins-state {
>  		function = "gsbi7";
>  	};
>  
> -	gsbi7_uart_4pins: gsbi7_uart_4pins-state {
> +	gsbi7_uart_4pins: gsbi7-uart-4pins-state {
>  		pins = "gpio82", "gpio83", "gpio84", "gpio85";
>  		function = "gsbi7";
>  	};
> diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
> index 95be1d2e214f..06c0af0aa317 100644
> --- a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
> +++ b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
> @@ -1866,7 +1866,7 @@ cci_i2c1_sleep: cci-i2c1-sleep-pins {
>  				};
>  			};
>  
> -			spi8_default: spi8_default-state {
> +			spi8_default: spi8-default-state {
>  				mosi-pins {
>  					pins = "gpio45";
>  					function = "blsp_spi8";
> diff --git a/arch/arm/boot/dts/qcom/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom/qcom-sdx65-mtp.dts
> index 07c10c84eefa..2c0590617ac4 100644
> --- a/arch/arm/boot/dts/qcom/qcom-sdx65-mtp.dts
> +++ b/arch/arm/boot/dts/qcom/qcom-sdx65-mtp.dts
> @@ -55,7 +55,7 @@ vph_pwr: vph-pwr-regulator {
>  		regulator-max-microvolt = <3700000>;
>  	};
>  
> -	vreg_bob_3p3: pmx65_bob {
> +	vreg_bob_3p3: pmx65-bob-regulator {
>  		compatible = "regulator-fixed";
>  		regulator-name = "vreg_bob_3p3";
>  		regulator-min-microvolt = <3300000>;
> diff --git a/arch/arm64/boot/dts/qcom/lemans-evk-camera.dtso b/arch/arm64/boot/dts/qcom/lemans-evk-camera.dtso
> index 4600d5441cce..a4c6d39cf777 100644
> --- a/arch/arm64/boot/dts/qcom/lemans-evk-camera.dtso
> +++ b/arch/arm64/boot/dts/qcom/lemans-evk-camera.dtso
> @@ -14,7 +14,7 @@
>  #include <dt-bindings/gpio/gpio.h>
>  
>  &{/} {
> -	vreg_cam1_1p8: vreg_cam1_1p8 {
> +	vreg_cam1_1p8: cam1-1p8-regulator {
>  		compatible = "regulator-fixed";
>  		regulator-name = "vreg_cam1_1p8";
>  		startup-delay-us = <10000>;
> diff --git a/arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi b/arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi
> index 40f88498999b..cefb8ff00806 100644
> --- a/arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi
> +++ b/arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi
> @@ -63,7 +63,7 @@ vreg_3p3: vreg-3p3-regulator {
>  		regulator-max-microvolt = <3300000>;
>  	};
>  
> -	vreg_conn_1p8: vreg_conn_1p8 {
> +	vreg_conn_1p8: vreg-conn-1p8-regulator {
>  		compatible = "regulator-fixed";
>  		regulator-name = "vreg_conn_1p8";
>  		startup-delay-us = <4000>;
> @@ -71,7 +71,7 @@ vreg_conn_1p8: vreg_conn_1p8 {
>  		gpio = <&pmm8654au_1_gpios 4 GPIO_ACTIVE_HIGH>;
>  	};
>  
> -	vreg_conn_pa: vreg_conn_pa {
> +	vreg_conn_pa: vreg-conn-pa-regulator {
>  		compatible = "regulator-fixed";
>  		regulator-name = "vreg_conn_pa";
>  		startup-delay-us = <4000>;
> diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi
> index 353a6e6fd3ac..e5a57a340cd8 100644
> --- a/arch/arm64/boot/dts/qcom/lemans.dtsi
> +++ b/arch/arm64/boot/dts/qcom/lemans.dtsi
> @@ -1041,7 +1041,7 @@ qfprom: efuse@784000 {
>  			#address-cells = <1>;
>  			#size-cells = <1>;
>  
> -			gpu_speed_bin: gpu_speed_bin@240c {
> +			gpu_speed_bin: gpu-speed-bin@240c {
>  				reg = <0x240c 0x1>;
>  				bits = <0 8>;
>  			};
> diff --git a/arch/arm64/boot/dts/qcom/milos-nothing-asteroids.dts b/arch/arm64/boot/dts/qcom/milos-nothing-asteroids.dts
> index 7393978926e4..0796d9dbe158 100644
> --- a/arch/arm64/boot/dts/qcom/milos-nothing-asteroids.dts
> +++ b/arch/arm64/boot/dts/qcom/milos-nothing-asteroids.dts
> @@ -136,7 +136,7 @@ ramoops@81f20000 {
>  		 * ABL is powering down display and controller if this node is
>  		 * not named exactly "splash_region".
>  		 */
> -		splash_region@e3940000 {
> +		splash@e3940000 {

Please read the comment above, newer ABLs explicitly check for
"splash_region" being present.

Regards
Luca

>  			reg = <0x0 0xe3940000 0x0 0x2b00000>;
>  			no-map;
>  		};
> diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi
> index a350a8ba48fa..c50ce1843703 100644
> --- a/arch/arm64/boot/dts/qcom/monaco.dtsi
> +++ b/arch/arm64/boot/dts/qcom/monaco.dtsi
> @@ -2927,7 +2927,7 @@ ws-pins {
>  				};
>  			};
>  
> -			lpi_i2s4_active: lpi_i2s4-active-state {
> +			lpi_i2s4_active: lpi-i2s4-active-state {
>  				data0-pins {
>  					pins = "gpio17";
>  					function = "i2s4_data";
> diff --git a/arch/arm64/boot/dts/qcom/sm6125-xiaomi-ginkgo-common.dtsi b/arch/arm64/boot/dts/qcom/sm6125-xiaomi-ginkgo-common.dtsi
> index 7eecd9dc3028..70c130c5426c 100644
> --- a/arch/arm64/boot/dts/qcom/sm6125-xiaomi-ginkgo-common.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm6125-xiaomi-ginkgo-common.dtsi
> @@ -46,22 +46,22 @@ framebuffer {
>  	};
>  
>  	reserved-memory {
> -		adsp_pil_mem: adsp_pil_mem@55300000 {
> +		adsp_pil_mem: adsp-pil-mem@55300000 {
>  			reg = <0x0 0x55300000 0x0 0x2200000>;
>  			no-map;
>  		};
>  
> -		ipa_fw_mem: ipa_fw_mem@57500000 {
> +		ipa_fw_mem: ipa-fw-mem@57500000 {
>  			reg = <0x0 0x57500000 0x0 0x10000>;
>  			no-map;
>  		};
>  
> -		ipa_gsi_mem: ipa_gsi_mem@57510000 {
> +		ipa_gsi_mem: ipa-gsi-mem@57510000 {
>  			reg = <0x0 0x57510000 0x0 0x5000>;
>  			no-map;
>  		};
>  
> -		gpu_mem: gpu_mem@57515000 {
> +		gpu_mem: gpu-mem@57515000 {
>  			reg = <0x0 0x57515000 0x0 0x2000>;
>  			no-map;
>  		};