Re: [tip: x86/msr] x86/cpu: Stop using 32-bit MSR interfaces

[Juergen Gross]

On 03.07.26 23:48, Borislav Petkov wrote:
> On Thu, Jul 02, 2026 at 10:15:54AM -0000, tip-bot2 for Juergen Gross wrote:
> > diff --git a/arch/x86/kernel/cpu/transmeta.c b/arch/x86/kernel/cpu/transmeta.c
> > index 1fdcd69..c670fbb 100644
> > --- a/arch/x86/kernel/cpu/transmeta.c
> > +++ b/arch/x86/kernel/cpu/transmeta.c
> > @@ -24,7 +24,8 @@ static void early_init_transmeta(struct cpuinfo_x86 *c)
> >   
> >   static void init_transmeta(struct cpuinfo_x86 *c)
> >   {
> > -	unsigned int cap_mask, uk, max, dummy;
> > +	u64 msr;
> > +	unsigned int max, dummy;
> >   	unsigned int cms_rev1, cms_rev2;
> >   	unsigned int cpu_rev, cpu_freq = 0, cpu_flags, new_cpu_rev;
> >   	char cpu_info[65];
>
> The tip-tree preferred ordering of variable declarations at the
> beginning of a function is reverse fir tree order::
>
> 	struct long_struct_name *descriptive_name;
> 	unsigned long foo, bar;
> 	unsigned int tmp;
> 	int ret;
>
> The above is faster to parse than the reverse ordering::
>
> 	int ret;
> 	unsigned int tmp;
> 	unsigned long foo, bar;
> 	struct long_struct_name *descriptive_name;
>
> And even more so than random ordering::
>
> 	unsigned long foo, bar;
> 	int ret;
> 	struct long_struct_name *descriptive_name;
> 	unsigned int tmp;

What are the expectations regarding this patch now?

I could:

- do nothing

- send a V2 of the patch

- send an incremental patch


Juergen

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