Re: [PATCH v3 RESEND 3/5] arm64: dts: qcom: Add device tree for Nord SA8797P SoC

[Pavan Kondeti]

On Mon, Jul 06, 2026 at 07:15:15PM -0700, Deepti Jaggi wrote:
> 
> 
> On 7/6/2026 6:57 AM, Pavan Kondeti wrote:
> > On Tue, May 26, 2026 at 01:12:58PM +0800, Shawn Guo wrote:
> >> diff --git a/arch/arm64/boot/dts/qcom/scmi-common.dtsi b/arch/arm64/boot/dts/qcom/scmi-common.dtsi
> >> new file mode 100644
> >> index 000000000000..0c7ffe9e415c
> >> --- /dev/null
> >> +++ b/arch/arm64/boot/dts/qcom/scmi-common.dtsi
> >> @@ -0,0 +1,1918 @@
> >> +// SPDX-License-Identifier: BSD-3-Clause
> >> +/*
> >> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
> >> + */
> >> +
> >> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> >> +
> >> +&firmware {
> >> +	scmi0: scmi-0 {
> >> +		compatible = "qcom,scmi-smc";
> >> +		arm,smc-id = <0xc6008012>;
> >> +		shmem = <&shmem0>;
> >> +		interrupts = <GIC_SPI 963 IRQ_TYPE_EDGE_RISING>;
> >> +		interrupt-names = "a2p";
> > 
> > I believe this interrupt source is GearVM firmware via Gunyah's
> > doorbell, correct? How do we know that scmi0 instance's interrupt 
> > is GIC_SPI#963? Are these assumed to be constant/fixed through out
> > the life time of this SoC?
> 
> Yes, this interrupt is a Gunyah Rx doorbell VIRQ for SCMI a2p completion
> from GearVM to Linux. It is allocated by Gunyah RM from the platform's virtual
> IRQ range and patched into the DTB by Linux bootloader at boot stage.
>  
> > 

Thanks Deepti. IIUC, GIC_SPI#963 may be overridden by bootloader and
potentially this IRQ can change across runs or when firmware is changed
etc. The interrupt property is a place holder. can you confirm please?

Thanks,
Pavan