[PATCH RESEND 2/9] dt-bindings: clock: stm32: add STM32H7RS RCC
From: Liu Changjie
Date: Sun Jul 26 2026 - 12:15:14 EST
Extend the STM32 RCC binding for STM32H7RS and add its clock and
reset IDs. First-stage firmware configures the clock tree for
external-memory execution, so Linux consumes the active tree and
controls peripheral gates and resets.
Signed-off-by: Liu Changjie <liucj1228@xxxxxxxxxxx>
---
.../bindings/clock/st,stm32-rcc.yaml | 73 +++++++++++++++----
include/dt-bindings/clock/stm32h7rs-clks.h | 32 ++++++++
include/dt-bindings/mfd/stm32h7rs-rcc.h | 11 +++
3 files changed, 102 insertions(+), 14 deletions(-)
create mode 100644 include/dt-bindings/clock/stm32h7rs-clks.h
create mode 100644 include/dt-bindings/mfd/stm32h7rs-rcc.h
diff --git a/Documentation/devicetree/bindings/clock/st,stm32-rcc.yaml b/Documentation/devicetree/bindings/clock/st,stm32-rcc.yaml
index f83a6120d..48a878c33 100644
--- a/Documentation/devicetree/bindings/clock/st,stm32-rcc.yaml
+++ b/Documentation/devicetree/bindings/clock/st,stm32-rcc.yaml
@@ -22,6 +22,7 @@ properties:
- st,stm32f42xx-rcc
- st,stm32f746-rcc
- st,stm32h743-rcc
+ - st,stm32h7rs-rcc
- const: st,stm32-rcc
- items:
- enum:
@@ -47,6 +48,10 @@ properties:
minItems: 2
maxItems: 3
+ clock-names:
+ minItems: 2
+ maxItems: 2
+
st,syscfg:
$ref: /schemas/types.yaml#/definitions/phandle
description:
@@ -79,14 +84,13 @@ required:
- '#reset-cells'
- '#clock-cells'
- clocks
- - st,syscfg
allOf:
- if:
properties:
compatible:
contains:
- const: st,stm32h743-rcc
+ const: st,stm32h7rs-rcc
then:
properties:
'#clock-cells':
@@ -97,23 +101,55 @@ allOf:
items:
- description: high speed external (HSE) clock input
- description: low speed external (LSE) clock input
- - description: Inter-IC sound (I2S) clock input
+ clock-names:
+ items:
+ - const: hse
+ - const: lse
+ st,syscfg: false
st,ssc-modfreq-hz: false
st,ssc-moddepth-permyriad: false
st,ssc-modmethod: false
+ required:
+ - clock-names
else:
- properties:
- '#clock-cells':
- const: 2
- description: |
- - The first cell is the clock type, possible values are 0 for
- gated clocks and 1 otherwise.
- - The second cell is the clock index for the specified type.
- clocks:
- items:
- - description: high speed external (HSE) clock input
- - description: Inter-IC sound (I2S) clock input
+ required:
+ - st,syscfg
+ allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: st,stm32h743-rcc
+ then:
+ properties:
+ '#clock-cells':
+ const: 1
+ description: |
+ The clock index for the specified type.
+ clocks:
+ items:
+ - description: high speed external (HSE) clock input
+ - description: low speed external (LSE) clock input
+ - description: Inter-IC sound (I2S) clock input
+ clock-names: false
+ st,ssc-modfreq-hz: false
+ st,ssc-moddepth-permyriad: false
+ st,ssc-modmethod: false
+
+ else:
+ properties:
+ '#clock-cells':
+ const: 2
+ description: |
+ - The first cell is the clock type, possible values are 0 for
+ gated clocks and 1 otherwise.
+ - The second cell is the clock index for the specified type.
+ clocks:
+ items:
+ - description: high speed external (HSE) clock input
+ - description: Inter-IC sound (I2S) clock input
+ clock-names: false
additionalProperties: false
@@ -140,5 +176,14 @@ examples:
clocks = <&clk_hse>, <&clk_lse>, <&clk_i2s>;
st,syscfg = <&pwrcfg>;
};
+ - |
+ reset-clock-controller@58024400 {
+ compatible = "st,stm32h7rs-rcc", "st,stm32-rcc";
+ reg = <0x58024400 0x400>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ clocks = <&clk_hse>, <&clk_lse>;
+ clock-names = "hse", "lse";
+ };
...
diff --git a/include/dt-bindings/clock/stm32h7rs-clks.h b/include/dt-bindings/clock/stm32h7rs-clks.h
new file mode 100644
index 000000000..e62e5d7e4
--- /dev/null
+++ b/include/dt-bindings/clock/stm32h7rs-clks.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
+#ifndef _DT_BINDINGS_CLOCK_STM32H7RS_CLKS_H
+#define _DT_BINDINGS_CLOCK_STM32H7RS_CLKS_H
+
+#define STM32H7RS_SYS_CK 0
+#define STM32H7RS_HCLK 1
+#define STM32H7RS_PCLK1 2
+#define STM32H7RS_PCLK2 3
+#define STM32H7RS_PCLK4 4
+#define STM32H7RS_PCLK5 5
+
+#define STM32H7RS_TIM5_CK 6
+#define STM32H7RS_UART4_CK 7
+
+#define STM32H7RS_GPIOA_CK 8
+#define STM32H7RS_GPIOB_CK 9
+#define STM32H7RS_GPIOC_CK 10
+#define STM32H7RS_GPIOD_CK 11
+#define STM32H7RS_GPIOE_CK 12
+#define STM32H7RS_GPIOF_CK 13
+#define STM32H7RS_GPIOG_CK 14
+#define STM32H7RS_GPIOH_CK 15
+#define STM32H7RS_GPIOM_CK 16
+#define STM32H7RS_GPION_CK 17
+#define STM32H7RS_GPIOO_CK 18
+#define STM32H7RS_GPIOP_CK 19
+
+#define STM32H7RS_SDMMC1_CK 20
+
+#define STM32H7RS_MAX_CLKS 21
+
+#endif /* _DT_BINDINGS_CLOCK_STM32H7RS_CLKS_H */
diff --git a/include/dt-bindings/mfd/stm32h7rs-rcc.h b/include/dt-bindings/mfd/stm32h7rs-rcc.h
new file mode 100644
index 000000000..2302e0df1
--- /dev/null
+++ b/include/dt-bindings/mfd/stm32h7rs-rcc.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
+#ifndef _DT_BINDINGS_MFD_STM32H7RS_RCC_H
+#define _DT_BINDINGS_MFD_STM32H7RS_RCC_H
+
+/* AHB5 */
+#define STM32H7RS_RCC_AHB5_SDMMC1 8
+
+#define STM32H7RS_AHB5_RESET(bit) \
+ (STM32H7RS_RCC_AHB5_##bit + (0x7c * 8))
+
+#endif /* _DT_BINDINGS_MFD_STM32H7RS_RCC_H */
--
2.55.0