Re: [PATCH] arm64: dts: qcom: eliza: Fix DSI1 phy reference clock rate

[Bjorn Andersson]

On Mon, 13 Jul 2026 14:58:38 +0200, Krzysztof Kozlowski wrote:
> The DSI PHY CXO clock input is the SoC CXO divided by two.  DSI0 already
> uses correct one, but DSI1 got copy-paste from SM8750, which had same
> problem and copy-pasted code from SM8650.  Wrong clock parent will cause
> incorrect DSI1 PHY PLL frequencies to be used making the DSI panel
> non-working, although there is no upstream user of DSI1.
> 
> 
> [...]

Applied, thanks!

[1/1] arm64: dts: qcom: eliza: Fix DSI1 phy reference clock rate
      commit: a3ba349af8e1bb7e0efdcd2dd53d69282f18478a

Best regards,
-- 
Bjorn Andersson <andersson@xxxxxxxxxx>