Re: [PATCH v2 2/4] usb: xhci: Honor PORTSC.TM if valid
From: Konrad Dybcio
Date: Fri Jul 31 2026 - 07:02:02 EST
On 7/31/26 12:51 PM, Mathias Nyman wrote:
> On 7/15/26 15:29, Konrad Dybcio wrote:
>> From: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxxxx>
>>
>> Currently, the only way for the USB core to determine whether the link
>> is native or tunneled is via an Intel vendor-specific Extended
>> Capability.
[...]
>> - /* Don't try and probe this capability for non-Intel hosts */
>> + /* Prefer the XHCI v1.2 ext_cap if advertised */
>> + offset = xhci_find_next_ext_cap(base, 0, XHCI_EXT_CAPS_USB3_TUNNELING);
>> + if (offset) {
>> + if (!(readl(base + offset) & XHCI_USB3_TUNNELING_SUPPORTED))
>> + return USB_LINK_NATIVE;
>> +
>
> The extcap 18 value won't change.
> We can read it once in xhci_gen_setup()/xhci_setup_port_arrays() and cache it.
>
> here we would just check:
>
> if (xhci->portsc_tunnel_reporting) {
> ..read portsc and return, as you do below
Got it
Konrad